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| author | Marc Zyngier <marc.zyngier@arm.com> | 2018-09-27 17:15:32 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2018-10-01 13:36:01 +0100 |
| commit | 50de013d22e4e112d7b0778a0e7d032f16c46778 (patch) | |
| tree | 58bcb8f04ccd27b425c6dd86b3aae1e440d7c121 /arch/arm64/kernel | |
| parent | 2a8905e18c55d5576d7a53da495b4de0cfcbc459 (diff) | |
| download | linux-stable-50de013d22e4e112d7b0778a0e7d032f16c46778.tar.gz linux-stable-50de013d22e4e112d7b0778a0e7d032f16c46778.tar.bz2 linux-stable-50de013d22e4e112d7b0778a0e7d032f16c46778.zip | |
arm64: compat: Add CNTVCT trap handler
Since people seem to make a point in breaking the userspace visible
counter, we have no choice but to trap the access. We already do this
for 64bit userspace, but this is lacking for compat. Let's provide
the required handler.
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel')
| -rw-r--r-- | arch/arm64/kernel/traps.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 76ffb9f42aa4..3602b900ff1c 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -629,7 +629,23 @@ static struct sys64_hook cp15_32_hooks[] = { {}, }; +static void compat_cntvct_read_handler(unsigned int esr, struct pt_regs *regs) +{ + int rt = (esr & ESR_ELx_CP15_64_ISS_RT_MASK) >> ESR_ELx_CP15_64_ISS_RT_SHIFT; + int rt2 = (esr & ESR_ELx_CP15_64_ISS_RT2_MASK) >> ESR_ELx_CP15_64_ISS_RT2_SHIFT; + u64 val = arch_counter_get_cntvct(); + + pt_regs_write_reg(regs, rt, lower_32_bits(val)); + pt_regs_write_reg(regs, rt2, upper_32_bits(val)); + arm64_compat_skip_faulting_instruction(regs, 4); +} + static struct sys64_hook cp15_64_hooks[] = { + { + .esr_mask = ESR_ELx_CP15_64_ISS_SYS_MASK, + .esr_val = ESR_ELx_CP15_64_ISS_SYS_CNTVCT, + .handler = compat_cntvct_read_handler, + }, {}, }; |