diff options
author | Marc Zyngier <maz@kernel.org> | 2020-04-29 11:21:55 +0100 |
---|---|---|
committer | Marc Zyngier <maz@kernel.org> | 2020-05-01 09:51:08 +0100 |
commit | 0225fd5e0a6a32af7af0aefac45c8ebf19dc5183 (patch) | |
tree | 8b5e04a3ff18733f18b68a7157e1884ab9eec0b9 /arch/arm64/kvm/guest.c | |
parent | 958e8e14fd24c0aa1fe6a6beb2b985cb638577d6 (diff) | |
download | linux-stable-0225fd5e0a6a32af7af0aefac45c8ebf19dc5183.tar.gz linux-stable-0225fd5e0a6a32af7af0aefac45c8ebf19dc5183.tar.bz2 linux-stable-0225fd5e0a6a32af7af0aefac45c8ebf19dc5183.zip |
KVM: arm64: Fix 32bit PC wrap-around
In the unlikely event that a 32bit vcpu traps into the hypervisor
on an instruction that is located right at the end of the 32bit
range, the emulation of that instruction is going to increment
PC past the 32bit range. This isn't great, as userspace can then
observe this value and get a bit confused.
Conversly, userspace can do things like (in the context of a 64bit
guest that is capable of 32bit EL0) setting PSTATE to AArch64-EL0,
set PC to a 64bit value, change PSTATE to AArch32-USR, and observe
that PC hasn't been truncated. More confusion.
Fix both by:
- truncating PC increments for 32bit guests
- sanitizing all 32bit regs every time a core reg is changed by
userspace, and that PSTATE indicates a 32bit mode.
Cc: stable@vger.kernel.org
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch/arm64/kvm/guest.c')
-rw-r--r-- | arch/arm64/kvm/guest.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c index 23ebe51410f0..50a279d3ddd7 100644 --- a/arch/arm64/kvm/guest.c +++ b/arch/arm64/kvm/guest.c @@ -200,6 +200,13 @@ static int set_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) } memcpy((u32 *)regs + off, valp, KVM_REG_SIZE(reg->id)); + + if (*vcpu_cpsr(vcpu) & PSR_MODE32_BIT) { + int i; + + for (i = 0; i < 16; i++) + *vcpu_reg32(vcpu, i) = (u32)*vcpu_reg32(vcpu, i); + } out: return err; } |