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| author | Will Deacon <will@kernel.org> | 2022-11-10 19:02:49 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2022-11-11 17:16:25 +0000 |
| commit | 13e248aab73d2f1c27b458ef09d38b44f3e5bf2e (patch) | |
| tree | da275c629f01a981393b47720ad00a491757240d /arch/arm64/kvm/hyp/nvhe/pkvm.c | |
| parent | 6c165223e9a6384aa1e934b90f2650e71adb972a (diff) | |
| download | linux-stable-13e248aab73d2f1c27b458ef09d38b44f3e5bf2e.tar.gz linux-stable-13e248aab73d2f1c27b458ef09d38b44f3e5bf2e.tar.bz2 linux-stable-13e248aab73d2f1c27b458ef09d38b44f3e5bf2e.zip | |
KVM: arm64: Provide I-cache invalidation by virtual address at EL2
In preparation for handling cache maintenance of guest pages from within
the pKVM hypervisor at EL2, introduce an EL2 copy of icache_inval_pou()
which will later be plumbed into the stage-2 page-table cache
maintenance callbacks, ensuring that the initial contents of pages
mapped as executable into the guest stage-2 page-table is visible to the
instruction fetcher.
Tested-by: Vincent Donnefort <vdonnefort@google.com>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221110190259.26861-17-will@kernel.org
Diffstat (limited to 'arch/arm64/kvm/hyp/nvhe/pkvm.c')
| -rw-r--r-- | arch/arm64/kvm/hyp/nvhe/pkvm.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c index 2c73c4640e4d..0768307566d4 100644 --- a/arch/arm64/kvm/hyp/nvhe/pkvm.c +++ b/arch/arm64/kvm/hyp/nvhe/pkvm.c @@ -12,6 +12,9 @@ #include <nvhe/pkvm.h> #include <nvhe/trap_handler.h> +/* Used by icache_is_vpipt(). */ +unsigned long __icache_flags; + /* * Set trap register values based on features in ID_AA64PFR0. */ |