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| author | Marc Zyngier <maz@kernel.org> | 2024-08-20 14:18:02 +0100 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2024-08-27 07:59:27 +0100 |
| commit | 13c7a51eeb747ec315485ac7b13d4ea03707f53e (patch) | |
| tree | dd2bbf1155b7451a865c95ed076a76a49415e0e5 /arch/arm64/kvm | |
| parent | c9150a8ad9cdb69584d4ec5af61481df41498eb8 (diff) | |
| download | linux-stable-13c7a51eeb747ec315485ac7b13d4ea03707f53e.tar.gz linux-stable-13c7a51eeb747ec315485ac7b13d4ea03707f53e.tar.bz2 linux-stable-13c7a51eeb747ec315485ac7b13d4ea03707f53e.zip | |
KVM: arm64: Expose ID_AA64PFR2_EL1 to userspace and guests
Everything is now in place for a guest to "enjoy" FP8 support.
Expose ID_AA64PFR2_EL1 to both userspace and guests, with the
explicit restriction of only being able to clear FPMR.
All other features (MTE* at the time of writing) are hidden
and not writable.
Reviewed-by: Mark Brown <broonie@kernel.org>
Tested-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20240820131802.3547589-9-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch/arm64/kvm')
| -rw-r--r-- | arch/arm64/kvm/sys_regs.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 51627add0a72..2d1e45178422 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1539,6 +1539,10 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu, val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_SME); break; + case SYS_ID_AA64PFR2_EL1: + /* We only expose FPMR */ + val &= ID_AA64PFR2_EL1_FPMR; + break; case SYS_ID_AA64ISAR1_EL1: if (!vcpu_has_ptrauth(vcpu)) val &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_APA) | @@ -2381,7 +2385,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { ID_AA64PFR0_EL1_AdvSIMD | ID_AA64PFR0_EL1_FP), }, ID_SANITISED(ID_AA64PFR1_EL1), - ID_UNALLOCATED(4,2), + ID_WRITABLE(ID_AA64PFR2_EL1, ID_AA64PFR2_EL1_FPMR), ID_UNALLOCATED(4,3), ID_WRITABLE(ID_AA64ZFR0_EL1, ~ID_AA64ZFR0_EL1_RES0), ID_HIDDEN(ID_AA64SMFR0_EL1), |