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author | Ard Biesheuvel <ardb@kernel.org> | 2023-01-11 11:22:36 +0100 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2023-01-24 11:51:08 +0000 |
commit | 61786170383093908e9f5f8fd8c5c3ff0c3bbe03 (patch) | |
tree | fb1bf4849a02cd89bb0ba73e7385f8b5daf4c52f /arch/arm64/mm | |
parent | 3dcf60bbfd284e5ebfa40c56172222425d10abf0 (diff) | |
download | linux-stable-61786170383093908e9f5f8fd8c5c3ff0c3bbe03.tar.gz linux-stable-61786170383093908e9f5f8fd8c5c3ff0c3bbe03.tar.bz2 linux-stable-61786170383093908e9f5f8fd8c5c3ff0c3bbe03.zip |
efi: arm64: enter with MMU and caches enabled
Instead of cleaning the entire loaded kernel image to the PoC and
disabling the MMU and caches before branching to the kernel's bare metal
entry point, we can leave the MMU and caches enabled, and rely on EFI's
cacheable 1:1 mapping of all of system RAM (which is mandated by the
spec) to populate the initial page tables.
This removes the need for managing coherency in software, which is
tedious and error prone.
Note that we still need to clean the executable region of the image to
the PoU if this is required for I/D coherency, but only if we actually
decided to move the image in memory, as otherwise, this will have been
taken care of by the loader.
This change affects both the builtin EFI stub as well as the zboot
decompressor, which now carries the entire EFI stub along with the
decompression code and the compressed image.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20230111102236.1430401-7-ardb@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/mm')
-rw-r--r-- | arch/arm64/mm/cache.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S index 081058d4e436..503567c864fd 100644 --- a/arch/arm64/mm/cache.S +++ b/arch/arm64/mm/cache.S @@ -56,6 +56,7 @@ SYM_FUNC_START(caches_clean_inval_pou) caches_clean_inval_pou_macro ret SYM_FUNC_END(caches_clean_inval_pou) +SYM_FUNC_ALIAS(__pi_caches_clean_inval_pou, caches_clean_inval_pou) /* * caches_clean_inval_user_pou(start,end) |