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authorArd Biesheuvel <ardb@kernel.org>2024-02-14 13:29:15 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2024-02-16 12:42:38 +0000
commitdb95ea787bd19be666ba41733259ffea65963bff (patch)
tree4b5b859adaad022e80f6140f4bd62d02b470c0e1 /arch/arm64/mm
parent7ac8d5b2423cc0112ac2519276610865142a577b (diff)
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arm64: mm: Wire up TCR.DS bit to PTE shareability fields
When LPA2 is enabled, bits 8 and 9 of page and block descriptors become part of the output address instead of carrying shareability attributes for the region in question. So avoid setting these bits if TCR.DS == 1, which means LPA2 is enabled. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20240214122845.2033971-74-ardb+git@google.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/mm')
-rw-r--r--arch/arm64/mm/mmap.c4
-rw-r--r--arch/arm64/mm/proc.S2
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/mm/mmap.c b/arch/arm64/mm/mmap.c
index 645fe60d000f..642bdf908b22 100644
--- a/arch/arm64/mm/mmap.c
+++ b/arch/arm64/mm/mmap.c
@@ -73,6 +73,10 @@ static int __init adjust_protection_map(void)
protection_map[VM_EXEC | VM_SHARED] = PAGE_EXECONLY;
}
+ if (lpa2_is_enabled())
+ for (int i = 0; i < ARRAY_SIZE(protection_map); i++)
+ pgprot_val(protection_map[i]) &= ~PTE_SHARED;
+
return 0;
}
arch_initcall(adjust_protection_map);
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index 6e1b2bc41a9f..7c46f8cfd6ae 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -466,6 +466,7 @@ alternative_else_nop_endif
*/
#define PTE_MAYBE_NG 0
+#define PTE_MAYBE_SHARED 0
mov_q x0, PIE_E0
msr REG_PIRE0_EL1, x0
@@ -473,6 +474,7 @@ alternative_else_nop_endif
msr REG_PIR_EL1, x0
#undef PTE_MAYBE_NG
+#undef PTE_MAYBE_SHARED
mov x0, TCR2_EL1x_PIE
msr REG_TCR2_EL1, x0