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| author | Marc Zyngier <maz@kernel.org> | 2022-11-13 16:38:17 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2022-11-17 15:39:09 +0000 |
| commit | d017eeabd5092565c3dd1c8a7b00ba724c33c18f (patch) | |
| tree | a19b11e52ac5d3cf9aa0f505c2555d53b1a08094 /arch/arm64 | |
| parent | 30a0b95b1335e12efef89dd78518ed3e4a71a763 (diff) | |
| download | linux-stable-d017eeabd5092565c3dd1c8a7b00ba724c33c18f.tar.gz linux-stable-d017eeabd5092565c3dd1c8a7b00ba724c33c18f.tar.bz2 linux-stable-d017eeabd5092565c3dd1c8a7b00ba724c33c18f.zip | |
arm64: Add ID_DFR0_EL1.PerfMon values for PMUv3p7 and IMP_DEF
Align the ID_DFR0_EL1.PerfMon values with ID_AA64DFR0_EL1.PMUver.
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221113163832.3154370-2-maz@kernel.org
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/include/asm/sysreg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 7d301700d1a9..84f59ce1dc6d 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -698,6 +698,8 @@ #define ID_DFR0_PERFMON_8_1 0x4 #define ID_DFR0_PERFMON_8_4 0x5 #define ID_DFR0_PERFMON_8_5 0x6 +#define ID_DFR0_PERFMON_8_7 0x7 +#define ID_DFR0_PERFMON_IMP_DEF 0xf #define ID_ISAR4_SWP_FRAC_SHIFT 28 #define ID_ISAR4_PSR_M_SHIFT 24 |