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| author | Elaine Zhang <zhangqing@rock-chips.com> | 2021-04-17 13:29:42 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2021-05-10 09:31:46 +0200 |
| commit | d5de0d688ac6e0202674577b05d0726b8a6af401 (patch) | |
| tree | 82fde20a4d182e38f36471276e84a522df75b3cd /arch/arm64 | |
| parent | 2bf375982f4a58a95e8b5184565b23677900012c (diff) | |
| download | linux-stable-d5de0d688ac6e0202674577b05d0726b8a6af401.tar.gz linux-stable-d5de0d688ac6e0202674577b05d0726b8a6af401.tar.bz2 linux-stable-d5de0d688ac6e0202674577b05d0726b8a6af401.zip | |
arm64: dts: rockchip: Fix power-controller node names for px30
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-6-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30.dtsi | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 86644e24aa5f..bcbe35a0f0eb 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -244,20 +244,20 @@ #size-cells = <0>; /* These power domains are grouped by VD_LOGIC */ - pd_usb@PX30_PD_USB { + power-domain@PX30_PD_USB { reg = <PX30_PD_USB>; clocks = <&cru HCLK_HOST>, <&cru HCLK_OTG>, <&cru SCLK_OTG_ADP>; pm_qos = <&qos_usb_host>, <&qos_usb_otg>; }; - pd_sdcard@PX30_PD_SDCARD { + power-domain@PX30_PD_SDCARD { reg = <PX30_PD_SDCARD>; clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; pm_qos = <&qos_sdmmc>; }; - pd_gmac@PX30_PD_GMAC { + power-domain@PX30_PD_GMAC { reg = <PX30_PD_GMAC>; clocks = <&cru ACLK_GMAC>, <&cru PCLK_GMAC>, @@ -265,7 +265,7 @@ <&cru SCLK_GMAC_RX_TX>; pm_qos = <&qos_gmac>; }; - pd_mmc_nand@PX30_PD_MMC_NAND { + power-domain@PX30_PD_MMC_NAND { reg = <PX30_PD_MMC_NAND>; clocks = <&cru HCLK_NANDC>, <&cru HCLK_EMMC>, @@ -278,14 +278,14 @@ pm_qos = <&qos_emmc>, <&qos_nand>, <&qos_sdio>, <&qos_sfc>; }; - pd_vpu@PX30_PD_VPU { + power-domain@PX30_PD_VPU { reg = <PX30_PD_VPU>; clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>, <&cru SCLK_CORE_VPU>; pm_qos = <&qos_vpu>, <&qos_vpu_r128>; }; - pd_vo@PX30_PD_VO { + power-domain@PX30_PD_VO { reg = <PX30_PD_VO>; clocks = <&cru ACLK_RGA>, <&cru ACLK_VOPB>, @@ -301,7 +301,7 @@ pm_qos = <&qos_rga_rd>, <&qos_rga_wr>, <&qos_vop_m0>, <&qos_vop_m1>; }; - pd_vi@PX30_PD_VI { + power-domain@PX30_PD_VI { reg = <PX30_PD_VI>; clocks = <&cru ACLK_CIF>, <&cru ACLK_ISP>, @@ -312,7 +312,7 @@ <&qos_isp_wr>, <&qos_isp_m1>, <&qos_vip>; }; - pd_gpu@PX30_PD_GPU { + power-domain@PX30_PD_GPU { reg = <PX30_PD_GPU>; clocks = <&cru SCLK_GPU>; pm_qos = <&qos_gpu>; |