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authorAndy Yan <andyshrk@163.com>2024-10-28 20:34:56 +0800
committerHeiko Stuebner <heiko@sntech.de>2024-11-11 16:31:34 +0100
commitec70819521b743ba7394013f98f216fda766d8a5 (patch)
tree3f8fc3f00b79a4478f20560712cd1df38b45e91b /arch/arm64
parent5ec7566e70e172c127d10e1ded884156fb2c3c49 (diff)
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arm64: dts: rockchip: Enable HDMI0 for rk3588 Cool Pi CM5 EVB
As the hdmi-qp controller recently get merged, we can enable the HDMI0 display on this board now. Signed-off-by: Andy Yan <andyshrk@163.com> Link: https://lore.kernel.org/r/20241028123503.384866-2-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts47
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts
index a4946cdc3bb3..610a610e56ee 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include <dt-bindings/leds/common.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
#include "rk3588-coolpi-cm5.dtsi"
/ {
@@ -22,6 +23,17 @@
pwms = <&pwm2 0 25000 0>;
};
+ hdmi-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi0_out_con>;
+ };
+ };
+ };
+
leds: leds {
compatible = "gpio-leds";
@@ -101,6 +113,26 @@
};
};
+&hdmi0 {
+ status = "okay";
+};
+
+&hdmi0_in {
+ hdmi0_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi0>;
+ };
+};
+
+&hdmi0_out {
+ hdmi0_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdptxphy_hdmi0 {
+ status = "okay";
+};
+
/* M.2 E-Key */
&pcie2x1l1 {
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
@@ -214,3 +246,18 @@
&usb_host1_ohci {
status = "okay";
};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi0_in_vp0>;
+ };
+};