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| author | Rob Herring (Arm) <robh@kernel.org> | 2024-10-02 13:43:24 -0500 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2024-10-28 17:27:15 +0000 |
| commit | 0bbff9ed81654d5f06bfca484681756ee407f924 (patch) | |
| tree | 10ab083995cee3f3802c0ffa2b076dfcfa50d08a /arch/arm | |
| parent | 759b5fc6cc3e3c5841f6a3e4638b39534b0fc716 (diff) | |
| download | linux-stable-0bbff9ed81654d5f06bfca484681756ee407f924.tar.gz linux-stable-0bbff9ed81654d5f06bfca484681756ee407f924.tar.bz2 linux-stable-0bbff9ed81654d5f06bfca484681756ee407f924.zip | |
perf/arm_pmuv3: Add PMUv3.9 per counter EL0 access control
Armv8.9/9.4 PMUv3.9 adds per counter EL0 access controls. Per counter
access is enabled with the UEN bit in PMUSERENR_EL1 register. Individual
counters are enabled/disabled in the PMUACR_EL1 register. When UEN is
set, the CR/ER bits control EL0 write access and must be set to disable
write access.
With the access controls, the clearing of unused counters can be
skipped.
KVM also configures PMUSERENR_EL1 in order to trap to EL2. UEN does not
need to be set for it since only PMUv3.5 is exposed to guests.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20241002184326.1105499-1-robh@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/include/asm/arm_pmuv3.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arm_pmuv3.h b/arch/arm/include/asm/arm_pmuv3.h index f63ba8986b24..d242b5e1ca0d 100644 --- a/arch/arm/include/asm/arm_pmuv3.h +++ b/arch/arm/include/asm/arm_pmuv3.h @@ -231,6 +231,7 @@ static inline void kvm_vcpu_pmu_resync_el0(void) {} #define ARMV8_PMU_DFR_VER_V3P1 0x4 #define ARMV8_PMU_DFR_VER_V3P4 0x5 #define ARMV8_PMU_DFR_VER_V3P5 0x6 +#define ARMV8_PMU_DFR_VER_V3P9 0x9 #define ARMV8_PMU_DFR_VER_IMP_DEF 0xF static inline bool pmuv3_implemented(int pmuver) @@ -249,6 +250,11 @@ static inline bool is_pmuv3p5(int pmuver) return pmuver >= ARMV8_PMU_DFR_VER_V3P5; } +static inline bool is_pmuv3p9(int pmuver) +{ + return pmuver >= ARMV8_PMU_DFR_VER_V3P9; +} + static inline u64 read_pmceid0(void) { u64 val = read_sysreg(PMCEID0); |