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authorChristoph Niedermaier <cniedermaier@dh-electronics.com>2021-08-02 16:10:34 +0200
committerShawn Guo <shawnguo@kernel.org>2021-08-09 15:34:21 +0800
commit1f58e94c5462b92d5974c638dce9c8611182d221 (patch)
treee8f1ea363a43514c0c43248c9b65e1c3cb0dfa51 /arch/arm
parent00342c631eecd55b324f3acfc41a5925e5ff3986 (diff)
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ARM: dts: imx6q-dhcom: Rearrange of iomux
Move iomux to the end, no change in function. Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: kernel@dh-electronics.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/imx6q-dhcom-pdk2.dts56
-rw-r--r--arch/arm/boot/dts/imx6q-dhcom-som.dtsi210
2 files changed, 133 insertions, 133 deletions
diff --git a/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts b/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts
index 3ea077ec8606..897bbeb91d64 100644
--- a/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts
+++ b/arch/arm/boot/dts/imx6q-dhcom-pdk2.dts
@@ -248,6 +248,34 @@
};
};
+&ipu1_di0_disp0 {
+ remote-endpoint = <&lcd_display_in>;
+};
+
+&pcie {
+ pinctrl-0 = <&pinctrl_pcie &pinctrl_dhcom_j>;
+ reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
+&ssi1 {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+};
+
+&usdhc3 {
+ status = "okay";
+};
+
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <
@@ -349,31 +377,3 @@
>;
};
};
-
-&ipu1_di0_disp0 {
- remote-endpoint = <&lcd_display_in>;
-};
-
-&pcie {
- pinctrl-0 = <&pinctrl_pcie &pinctrl_dhcom_j>;
- reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&pwm1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm1>;
- status = "okay";
-};
-
-&ssi1 {
- status = "okay";
-};
-
-&sata {
- status = "okay";
-};
-
-&usdhc3 {
- status = "okay";
-};
diff --git a/arch/arm/boot/dts/imx6q-dhcom-som.dtsi b/arch/arm/boot/dts/imx6q-dhcom-som.dtsi
index a361e161fba1..829f31bc569d 100644
--- a/arch/arm/boot/dts/imx6q-dhcom-som.dtsi
+++ b/arch/arm/boot/dts/imx6q-dhcom-som.dtsi
@@ -315,6 +315,111 @@
};
};
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+};
+
+&reg_arm {
+ vin-supply = <&sw3_reg>;
+};
+
+&reg_soc {
+ vin-supply = <&sw1_reg>;
+};
+
+&reg_pu {
+ vin-supply = <&sw1_reg>;
+};
+
+&reg_vdd1p1 {
+ vin-supply = <&sw2_reg>;
+};
+
+&reg_vdd2p5 {
+ vin-supply = <&sw2_reg>;
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ uart-has-rtscts;
+ dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
+ dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
+ dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
+ rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&usbh1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbh1>;
+ vbus-supply = <&reg_usb_h1_vbus>;
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbotg {
+ vbus-supply = <&reg_usb_otg_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg>;
+ disable-over-current;
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
+ keep-power-in-suspend;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
+ fsl,wp-controller;
+ keep-power-in-suspend;
+ status = "disabled";
+};
+
+&usdhc4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc4>;
+ non-removable;
+ bus-width = <8>;
+ no-1-8-v;
+ keep-power-in-suspend;
+ status = "okay";
+};
+
+&weim {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ fsl,weim-cs-gpr = <&gpr>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_weim &pinctrl_weim_cs0 &pinctrl_weim_cs1>;
+ /* It is necessary to setup 2x 64MB otherwise setting gpr fails */
+ ranges = <0 0 0x08000000 0x04000000>, /* CS0 */
+ <1 0 0x0c000000 0x04000000>; /* CS1 */
+ status = "disabled";
+};
+
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <
@@ -680,108 +785,3 @@
>;
};
};
-
-&pcie {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcie>;
-};
-
-&reg_arm {
- vin-supply = <&sw3_reg>;
-};
-
-&reg_soc {
- vin-supply = <&sw1_reg>;
-};
-
-&reg_pu {
- vin-supply = <&sw1_reg>;
-};
-
-&reg_vdd1p1 {
- vin-supply = <&sw2_reg>;
-};
-
-&reg_vdd2p5 {
- vin-supply = <&sw2_reg>;
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- uart-has-rtscts;
- dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
- dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
- dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
- rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&uart4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart4>;
- status = "okay";
-};
-
-&uart5 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart5>;
- uart-has-rtscts;
- status = "okay";
-};
-
-&usbh1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbh1>;
- vbus-supply = <&reg_usb_h1_vbus>;
- dr_mode = "host";
- status = "okay";
-};
-
-&usbotg {
- vbus-supply = <&reg_usb_otg_vbus>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbotg>;
- disable-over-current;
- dr_mode = "otg";
- status = "okay";
-};
-
-&usdhc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc2>;
- cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
- keep-power-in-suspend;
- status = "okay";
-};
-
-&usdhc3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc3>;
- cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
- fsl,wp-controller;
- keep-power-in-suspend;
- status = "disabled";
-};
-
-&usdhc4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc4>;
- non-removable;
- bus-width = <8>;
- no-1-8-v;
- keep-power-in-suspend;
- status = "okay";
-};
-
-&weim {
- #address-cells = <2>;
- #size-cells = <1>;
- fsl,weim-cs-gpr = <&gpr>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_weim &pinctrl_weim_cs0 &pinctrl_weim_cs1>;
- /* It is necessary to setup 2x 64MB otherwise setting gpr fails */
- ranges = <0 0 0x08000000 0x04000000>, /* CS0 */
- <1 0 0x0c000000 0x04000000>; /* CS1 */
- status = "disabled";
-};