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| author | Mikulas Patocka <mpatocka@redhat.com> | 2018-03-08 08:25:24 -0500 |
|---|---|---|
| committer | Mike Snitzer <snitzer@redhat.com> | 2018-06-08 11:59:51 -0400 |
| commit | 48debafe4f2feabcc99f8e2659e80557e3ca6b39 (patch) | |
| tree | 898a7c9c33238b068a79d40e97c380b36b1498ee /arch/arm | |
| parent | 72d711c8768805b5f8cf2d23c575dfd188993e12 (diff) | |
| download | linux-stable-48debafe4f2feabcc99f8e2659e80557e3ca6b39.tar.gz linux-stable-48debafe4f2feabcc99f8e2659e80557e3ca6b39.tar.bz2 linux-stable-48debafe4f2feabcc99f8e2659e80557e3ca6b39.zip | |
dm: add writecache target
The writecache target caches writes on persistent memory or SSD.
It is intended for databases or other programs that need extremely low
commit latency.
The writecache target doesn't cache reads because reads are supposed to
be cached in page cache in normal RAM.
If persistent memory isn't available this target can still be used in
SSD mode.
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com> # fix missing goto
Signed-off-by: Ross Zwisler <ross.zwisler@linux.intel.com> # fix compilation issue with !DAX
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> # use msecs_to_jiffies
Acked-by: Dan Williams <dan.j.williams@intel.com> # reworks to unify ARM and x86 flushing
Signed-off-by: Mike Snitzer <msnitzer@redhat.com>
Diffstat (limited to 'arch/arm')
0 files changed, 0 insertions, 0 deletions