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author | Fabrizio Castro <fabrizio.castro@bp.renesas.com> | 2018-10-08 10:52:38 +0100 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2018-11-28 13:55:21 +0100 |
commit | 4f94af57237ad1c9c6328b468fd8fbbd19c2fb78 (patch) | |
tree | e76861c5a25a70a98eb75b1b3569747599f6e0db /arch/arm | |
parent | ddeec86cb608cc520bd69ab568135ee45d500595 (diff) | |
download | linux-stable-4f94af57237ad1c9c6328b468fd8fbbd19c2fb78.tar.gz linux-stable-4f94af57237ad1c9c6328b468fd8fbbd19c2fb78.tar.bz2 linux-stable-4f94af57237ad1c9c6328b468fd8fbbd19c2fb78.zip |
ARM: dts: r8a77470: Add I2C[0123] support
Add device tree nodes for the I2C[0123] controllers. Also, add
the aliases node.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/r8a77470.dtsi | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 9ec78d3d0ca8..9611a936e1b8 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -14,6 +14,14 @@ #address-cells = <2>; #size-cells = <2>; + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -237,6 +245,62 @@ reg = <0 0xe6300000 0 0x20000>; }; + i2c0: i2c@e6508000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a77470", + "renesas,rcar-gen2-i2c"; + reg = <0 0xe6508000 0 0x40>; + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 931>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 931>; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c1: i2c@e6518000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a77470", + "renesas,rcar-gen2-i2c"; + reg = <0 0xe6518000 0 0x40>; + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 930>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 930>; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c2: i2c@e6530000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a77470", + "renesas,rcar-gen2-i2c"; + reg = <0 0xe6530000 0 0x40>; + interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 929>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 929>; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + + i2c3: i2c@e6540000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a77470", + "renesas,rcar-gen2-i2c"; + reg = <0 0xe6540000 0 0x40>; + interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 928>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 928>; + i2c-scl-internal-delay-ns = <6>; + status = "disabled"; + }; + i2c4: i2c@e6520000 { #address-cells = <1>; #size-cells = <0>; |