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| author | Icenowy Zheng <icenowy@aosc.io> | 2018-07-11 21:44:50 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-07-12 09:23:20 +0200 |
| commit | 51ecdd779e31ed45709bc32ff7efd4b28c3ce083 (patch) | |
| tree | 62d2a52332f54c777f22cfd9d50617702c02f791 /arch/arm | |
| parent | 7389172fc3ed5c4c6757e853d7d5bd2cfc6d204b (diff) | |
| download | linux-stable-51ecdd779e31ed45709bc32ff7efd4b28c3ce083.tar.gz linux-stable-51ecdd779e31ed45709bc32ff7efd4b28c3ce083.tar.bz2 linux-stable-51ecdd779e31ed45709bc32ff7efd4b28c3ce083.zip | |
ARM: sun8i: h3: add SY8113B regulator on Banana Pi M2 Zero board
Banana Pi M2 Zero board has a SY8113B regulator, which is controlled via
GPIO and capable of outputing 1.1V when the PL1 GPIO is set to output 0
or 1.1V when the PL6 GPIO is set to input or output 1, and the output is
the power supply of the ARM cores in H3 SoC.
Add the device tree node of this regulator and set the cpu's cpu-supply
property to it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts index 7d01f9322658..1db2541135a7 100644 --- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts +++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts @@ -48,6 +48,23 @@ }; }; + reg_vdd_cpux: vdd-cpux-regulator { + compatible = "regulator-gpio"; + regulator-name = "vdd-cpux"; + regulator-type = "voltage"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-ramp-delay = <50>; /* 4ms */ + + gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */ + enable-active-high; + gpios-states = <0x1>; + states = <1100000 0x0 + 1300000 0x1>; + }; + wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; @@ -55,6 +72,10 @@ }; }; +&cpu0 { + cpu-supply = <®_vdd_cpux>; +}; + &ehci0 { status = "okay"; }; |