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| author | Arnd Bergmann <arnd@arndb.de> | 2015-11-27 17:41:48 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2015-11-27 17:41:48 +0100 |
| commit | a405fd1b1fd2f96ab7c57a600d3c21f4eae6882c (patch) | |
| tree | fe19a068660eb9721ccd9d891238a32e36203ce2 /arch/arm | |
| parent | 5530f8517129150bf915592ed7654ec7fbd72943 (diff) | |
| parent | 784359b824bf2b095b257eefcd9615a3c48f2d8a (diff) | |
| download | linux-stable-a405fd1b1fd2f96ab7c57a600d3c21f4eae6882c.tar.gz linux-stable-a405fd1b1fd2f96ab7c57a600d3c21f4eae6882c.tar.bz2 linux-stable-a405fd1b1fd2f96ab7c57a600d3c21f4eae6882c.zip | |
Merge tag 'v4.4-rockchip-dts32-fixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes
Merge "ARM: rockchip: devicetree fixes for 4.4" from Heiko Stuebner:
Two fixes to Rockchip devicetree files, disabling the mmc-tuning
on the veyron-minnie board for now and adding the init state for
the over-temperature-protection to prevent glitches making the
system reboot sometimes.
* tag 'v4.4-rockchip-dts32-fixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add OTP gpio pinctrl to rk3288 tsadc node
ARM: dts: rockchip: temporarily remove emmc hs200 speed from rk3288 minnie
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/rk3288-veyron-minnie.dts | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 10 |
2 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts index 8fd8ef2c72da..85f0373df498 100644 --- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts +++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts @@ -86,6 +86,10 @@ }; }; +&emmc { + /delete-property/mmc-hs200-1_8v; +}; + &gpio_keys { pinctrl-0 = <&pwr_key_l &ap_lid_int_l &volum_down_l &volum_up_l>; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 6a79c9c526b8..04ea209f1737 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -452,8 +452,10 @@ clock-names = "tsadc", "apb_pclk"; resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; - pinctrl-names = "default"; - pinctrl-0 = <&otp_out>; + pinctrl-names = "init", "default", "sleep"; + pinctrl-0 = <&otp_gpio>; + pinctrl-1 = <&otp_out>; + pinctrl-2 = <&otp_gpio>; #thermal-sensor-cells = <1>; rockchip,hw-tshut-temp = <95000>; status = "disabled"; @@ -1395,6 +1397,10 @@ }; tsadc { + otp_gpio: otp-gpio { + rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>; + }; + otp_out: otp-out { rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>; }; |