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authorHerve Codina <herve.codina@bootlin.com>2023-01-05 16:22:56 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-01-17 17:22:33 +0100
commite12069043418532184c554f89a9002d3bc543782 (patch)
tree0ce9d64e1fe4330a10570e0419318b12b2e9f82d /arch/arm
parent3e6e14ffdea41ca91d4c9afd88a1f736cf50a1f3 (diff)
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ARM: dts: r9a06g032: Add the USBF controller node
Add the USBF controller available in the r9a06g032 SoC. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230105152257.310642-5-herve.codina@bootlin.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/r9a06g032.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi
index 41e19c0986ce..0fa565a1c3ad 100644
--- a/arch/arm/boot/dts/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/r9a06g032.dtsi
@@ -117,6 +117,18 @@
};
};
+ udc: usb@4001e000 {
+ compatible = "renesas,r9a06g032-usbf", "renesas,rzn1-usbf";
+ reg = <0x4001e000 0x2000>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysctrl R9A06G032_HCLK_USBF>,
+ <&sysctrl R9A06G032_HCLK_USBPM>;
+ clock-names = "hclkf", "hclkpm";
+ power-domains = <&sysctrl>;
+ status = "disabled";
+ };
+
pci_usb: pci@40030000 {
compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1";
device_type = "pci";