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| author | Chris Packham <chris.packham@alliedtelesis.co.nz> | 2019-07-12 05:46:53 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2019-08-29 07:58:01 +0100 |
| commit | fd3bbde717b00a2db75d0c93264f412c1176008f (patch) | |
| tree | cb3a686528dd1523862a9a2b72ef6f075cdaa5f8 /arch/arm | |
| parent | 0770bc9214065e384080075ab9fcada8ad07038c (diff) | |
| download | linux-stable-fd3bbde717b00a2db75d0c93264f412c1176008f.tar.gz linux-stable-fd3bbde717b00a2db75d0c93264f412c1176008f.tar.bz2 linux-stable-fd3bbde717b00a2db75d0c93264f412c1176008f.zip | |
ARM: 8886/1: l2x0: support parity-enable/disable on aurora
The aurora cache on the Marvell Armada-XP SoC supports the same tag
parity features as the other l2x0 cache implementations.
[jlu@pengutronix.de: use aurora specific define AURORA_ACR_PARITY_EN]
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 83b733a1f1e6..46a616ec6b0c 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -1493,6 +1493,13 @@ static void __init aurora_of_parse(const struct device_node *np, mask |= AURORA_ACR_FORCE_WRITE_POLICY_MASK; } + if (of_property_read_bool(np, "arm,parity-enable")) { + mask |= AURORA_ACR_PARITY_EN; + val |= AURORA_ACR_PARITY_EN; + } else if (of_property_read_bool(np, "arm,parity-disable")) { + mask |= AURORA_ACR_PARITY_EN; + } + *aux_val &= ~mask; *aux_val |= val; *aux_mask &= ~mask; |