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authorPaul Cercueil <paul@crapouillou.net>2021-05-30 18:17:55 +0100
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2021-06-01 11:44:46 +0200
commit1660710cf5d8d44ec351a5df57c35516f1fbf5e0 (patch)
tree591624fadbf915c66cef78f5afc7d5c35ae4833c /arch/mips/Kconfig
parentc8ba52d1b7e317c54d461970e4bdeec10ea1d9c4 (diff)
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MIPS: mm: XBurst CPU requires sync after DMA
I am not sure why this is required, but if this is not enabled, reading from a buffer in which data has been DMA'd may read incorrect values. This used to happen for instance in mmc_app_send_scr() (drivers/mmc/core/sd_ops.c), where data is DMA'd to a buffer then copied by the CPU to a different location. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r--arch/mips/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index baa4ea9a0f25..7badc40baa1f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -112,6 +112,7 @@ config MACH_INGENIC
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_ZBOOT
select DMA_NONCOHERENT
+ select ARCH_HAS_SYNC_DMA_FOR_CPU
select IRQ_MIPS_CPU
select PINCTRL
select GPIOLIB