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authorJames Morris <jmorris@namei.org>2011-11-16 12:39:48 +1100
committerJames Morris <jmorris@namei.org>2011-11-16 12:39:48 +1100
commit24942c8e5cc8696064ee207ff29d4cf21f70dafc (patch)
tree08a8221eb72ec3da7746d7d76f6f5915ce77cde7 /arch/mips/alchemy/common/setup.c
parente163bc8e4a0cd1cdffadb58253f7651201722d56 (diff)
parentff0ff78068dd8a962358dbbdafa9d6f24540d3e5 (diff)
downloadlinux-stable-24942c8e5cc8696064ee207ff29d4cf21f70dafc.tar.gz
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Merge branch 'master'; commit 'v3.2-rc2' into next
Diffstat (limited to 'arch/mips/alchemy/common/setup.c')
-rw-r--r--arch/mips/alchemy/common/setup.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c
index 1b887c868417..37ffd997c616 100644
--- a/arch/mips/alchemy/common/setup.c
+++ b/arch/mips/alchemy/common/setup.c
@@ -73,8 +73,8 @@ void __init plat_mem_setup(void)
/* This routine should be valid for all Au1x based boards */
phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
{
- u32 start = (u32)Au1500_PCI_MEM_START;
- u32 end = (u32)Au1500_PCI_MEM_END;
+ unsigned long start = ALCHEMY_PCI_MEMWIN_START;
+ unsigned long end = ALCHEMY_PCI_MEMWIN_END;
/* Don't fixup 36-bit addresses */
if ((phys_addr >> 32) != 0)
@@ -82,7 +82,7 @@ phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
/* Check for PCI memory window */
if (phys_addr >= start && (phys_addr + size - 1) <= end)
- return (phys_t)((phys_addr - start) + Au1500_PCI_MEM_START);
+ return (phys_t)(AU1500_PCI_MEM_PHYS_ADDR + phys_addr);
/* default nop */
return phys_addr;