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| author | Manuel Lauss <manuel.lauss@gmail.com> | 2014-07-23 16:36:25 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-07-30 13:53:52 +0200 |
| commit | 9cf12167e909a86fbc4b39cf4cffef4cba40f1b3 (patch) | |
| tree | 034c96710ea6f4fb1de8c47d0132c585c8013693 /arch/mips/alchemy/devboards/db1550.c | |
| parent | 1d09de7dc76ef96a9a2c7c0244e20f12d68e6ef8 (diff) | |
| download | linux-stable-9cf12167e909a86fbc4b39cf4cffef4cba40f1b3.tar.gz linux-stable-9cf12167e909a86fbc4b39cf4cffef4cba40f1b3.tar.bz2 linux-stable-9cf12167e909a86fbc4b39cf4cffef4cba40f1b3.zip | |
MIPS: Alchemy: add helpers to access static memory ctrl registers.
This patch changes the static memory controller registers to offsets
from base, prefixes them with AU1000_ to avoid silent failures due to
changed addresses and introduces helpers to access them.
No functional changes, comparing assembly of a few select functions shows
no differences.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7463/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/devboards/db1550.c')
| -rw-r--r-- | arch/mips/alchemy/devboards/db1550.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/alchemy/devboards/db1550.c b/arch/mips/alchemy/devboards/db1550.c index 392fb89270d6..d1320665e7e3 100644 --- a/arch/mips/alchemy/devboards/db1550.c +++ b/arch/mips/alchemy/devboards/db1550.c @@ -151,7 +151,7 @@ static void au1550_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, static int au1550_nand_device_ready(struct mtd_info *mtd) { - return __raw_readl((void __iomem *)MEM_STSTAT) & 1; + return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1; } static struct mtd_partition db1550_nand_parts[] = { @@ -217,7 +217,7 @@ static struct platform_device pb1550_nand_dev = { static void __init pb1550_nand_setup(void) { - int boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) | + int boot_swapboot = (alchemy_rdsmem(AU1000_MEM_STSTAT) & (0x7 << 1)) | ((bcsr_read(BCSR_STATUS) >> 6) & 0x1); gpio_direction_input(206); /* de-assert NAND CS# */ |