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| author | 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> | 2022-05-13 03:33:40 +0800 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2022-05-23 11:10:01 +0200 |
| commit | 562dc4c9c2c1662bcfedf7026860ff306c969d70 (patch) | |
| tree | 950d91eee3fcce5e5daa948446ef153abe4360b9 /arch/mips/boot/dts/ingenic/x1830.dtsi | |
| parent | b2a5df71345c0aad3b06600722edb5364220ee65 (diff) | |
| download | linux-stable-562dc4c9c2c1662bcfedf7026860ff306c969d70.tar.gz linux-stable-562dc4c9c2c1662bcfedf7026860ff306c969d70.tar.bz2 linux-stable-562dc4c9c2c1662bcfedf7026860ff306c969d70.zip | |
MIPS: Ingenic: Refresh device tree for Ingenic SoCs and boards.
1.Add SSI nodes for X1000 SoC and X1830 SoC from Ingenic.
2.Refresh SSI related nodes in CU1000-Neo and CU1830-Neo.
3.The X1830 SoC used by the CU1830-Neo and the X1000 SoC
used by the CU1000-Neo are both single-core processors,
therefore the "OST_CLK_PERCPU_TIMER" ABI should not be
used in the OST nodes of the CU1830-Neo and CU1000-Neo,
it is just a coincidence that there is no problem now.
So replace the misused "OST_CLK_PERCPU_TIMER" ABI with
the correct "OST_CLK_EVENT_TIMER" ABI.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/boot/dts/ingenic/x1830.dtsi')
| -rw-r--r-- | arch/mips/boot/dts/ingenic/x1830.dtsi | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi index e75e68c305b0..efd556902cfd 100644 --- a/arch/mips/boot/dts/ingenic/x1830.dtsi +++ b/arch/mips/boot/dts/ingenic/x1830.dtsi @@ -240,6 +240,44 @@ status = "disabled"; }; + ssi0: spi@10043000 { + compatible = "ingenic,x1830-spi", "ingenic,x1000-spi"; + reg = <0x10043000 0x20>; + #address-cells = <1>; + #size-cells = <0>; + + interrupt-parent = <&intc>; + interrupts = <9>; + + clocks = <&cgu X1830_CLK_SSI0>; + clock-names = "spi"; + + dmas = <&pdma X1830_DMA_SSI0_RX 0xffffffff>, + <&pdma X1830_DMA_SSI0_TX 0xffffffff>; + dma-names = "rx", "tx"; + + status = "disabled"; + }; + + ssi1: spi@10044000 { + compatible = "ingenic,x1830-spi", "ingenic,x1000-spi"; + reg = <0x10044000 0x20>; + #address-cells = <1>; + #size-cells = <0>; + + interrupt-parent = <&intc>; + interrupts = <8>; + + clocks = <&cgu X1830_CLK_SSI1>; + clock-names = "spi"; + + dmas = <&pdma X1830_DMA_SSI1_RX 0xffffffff>, + <&pdma X1830_DMA_SSI1_TX 0xffffffff>; + dma-names = "rx", "tx"; + + status = "disabled"; + }; + i2c0: i2c-controller@10050000 { compatible = "ingenic,x1830-i2c", "ingenic,x1000-i2c"; reg = <0x10050000 0x1000>; @@ -294,6 +332,7 @@ pdma: dma-controller@13420000 { compatible = "ingenic,x1830-dma"; reg = <0x13420000 0x400>, <0x13421000 0x40>; + #dma-cells = <2>; interrupt-parent = <&intc>; |