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author | Kevin Hilman <khilman@linaro.org> | 2013-10-11 15:01:14 -0700 |
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committer | Kevin Hilman <khilman@linaro.org> | 2013-10-11 15:01:36 -0700 |
commit | f797bd4a02056dceb3c0fc9813d991eb4ee62a19 (patch) | |
tree | cd6b17d308f2711fd2493f877905054a54fb4285 /arch/mips/include/asm/cpu-features.h | |
parent | 695e6044775daac00bac95901b597540fbf3108e (diff) | |
parent | 4385a83d19be799c21af43fbb1ac90364d7a2384 (diff) | |
download | linux-stable-f797bd4a02056dceb3c0fc9813d991eb4ee62a19.tar.gz linux-stable-f797bd4a02056dceb3c0fc9813d991eb4ee62a19.tar.bz2 linux-stable-f797bd4a02056dceb3c0fc9813d991eb4ee62a19.zip |
Merge tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/soc
From Santosh Shilimkar:
SOC updates for Keystone II devices:
- Clock tree support
- Clock management support using PM core
- Keystone config update for EMDA with ack from Vinod
- Enable SPI and I2C drivers
* tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (510 commits)
ARM: keystone: Enable I2C and SPI bus support
ARM: keystone: Select TI_EDMA to be able to enable SPI driver
dma: Allow TI_EDMA selectable for ARCH_KEYSTONE
ARM: dts: keystone: Add the SPI nodes
ARM: dts: keystone: Add i2c device nodes
ARM: keystone: add PM domain support for clock management
ARM: keystone: Enable clock drivers
ARM: dts: keystone: Add clock phandle to UART nodes
ARM: dts: keystone: Add clock tree data to devicetree
+Linux 3.12-rc4
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/mips/include/asm/cpu-features.h')
-rw-r--r-- | arch/mips/include/asm/cpu-features.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index 51680d15ca8e..d445d060e346 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -187,7 +187,7 @@ /* * MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other - * pre-MIPS32/MIPS53 processors have CLO, CLZ. The IDT RC64574 is 64-bit and + * pre-MIPS32/MIPS64 processors have CLO, CLZ. The IDT RC64574 is 64-bit and * has CLO and CLZ but not DCLO nor DCLZ. For 64-bit kernels * cpu_has_clo_clz also indicates the availability of DCLO and DCLZ. */ |