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authorJames Morris <jmorris@namei.org>2011-04-19 21:32:41 +1000
committerJames Morris <jmorris@namei.org>2011-04-19 21:32:41 +1000
commitd4ab4e6a23f805abb8fc3cc34525eec3788aeca1 (patch)
treeeefd82c155bc27469a85667d759cd90facf4a6e3 /arch/mips/include/asm/mipsregs.h
parentc0fa797ae6cd02ff87c0bfe0d509368a3b45640e (diff)
parent96fd2d57b8252e16dfacf8941f7a74a6119197f5 (diff)
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Merge branch 'master'; commit 'v2.6.39-rc3' into next
Diffstat (limited to 'arch/mips/include/asm/mipsregs.h')
-rw-r--r--arch/mips/include/asm/mipsregs.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 4d9870975382..6a6f8a8f542d 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -922,7 +922,7 @@ do { \
#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
/*
- * The WatchLo register. There may be upto 8 of them.
+ * The WatchLo register. There may be up to 8 of them.
*/
#define read_c0_watchlo0() __read_ulong_c0_register($18, 0)
#define read_c0_watchlo1() __read_ulong_c0_register($18, 1)
@@ -942,7 +942,7 @@ do { \
#define write_c0_watchlo7(val) __write_ulong_c0_register($18, 7, val)
/*
- * The WatchHi register. There may be upto 8 of them.
+ * The WatchHi register. There may be up to 8 of them.
*/
#define read_c0_watchhi0() __read_32bit_c0_register($19, 0)
#define read_c0_watchhi1() __read_32bit_c0_register($19, 1)