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author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-10-09 14:26:48 +0200 |
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committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-10-12 12:05:40 +0200 |
commit | 20cc5b649d9978494fb29259763c2505f6acc3c0 (patch) | |
tree | 896b171f9a54b77bf143b2edf045a5616efe7bb1 /arch/mips/include | |
parent | 90c68c6dbcb439b4d8ed9736463d80b98c95771f (diff) | |
download | linux-stable-20cc5b649d9978494fb29259763c2505f6acc3c0.tar.gz linux-stable-20cc5b649d9978494fb29259763c2505f6acc3c0.tar.bz2 linux-stable-20cc5b649d9978494fb29259763c2505f6acc3c0.zip |
MIPS: cpu-probe: remove MIPS_CPU_BP_GHIST option bit
MIPS_CPU_BP_GHIST is only set two times and more or less immediately
used in cpu-probe.c itself. Remove this option to make room in options
word.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/cpu-features.h | 3 | ||||
-rw-r--r-- | arch/mips/include/asm/cpu.h | 1 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h | 1 |
3 files changed, 0 insertions, 5 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index 78cf7e300f12..f2e216eef7da 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -171,9 +171,6 @@ #ifndef cpu_has_llsc #define cpu_has_llsc __isa_ge_or_opt(1, MIPS_CPU_LLSC) #endif -#ifndef cpu_has_bp_ghist -#define cpu_has_bp_ghist __opt(MIPS_CPU_BP_GHIST) -#endif #ifndef kernel_uses_llsc #define kernel_uses_llsc cpu_has_llsc #endif diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 388a82f28a87..c9222cc2244f 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -398,7 +398,6 @@ enum cpu_type_enum { #define MIPS_CPU_RW_LLB BIT_ULL(32) /* LLADDR/LLB writes are allowed */ #define MIPS_CPU_LPA BIT_ULL(33) /* CPU supports Large Physical Addressing */ #define MIPS_CPU_CDMM BIT_ULL(34) /* CPU has Common Device Memory Map */ -#define MIPS_CPU_BP_GHIST BIT_ULL(35) /* R12K+ Branch Prediction Global History */ #define MIPS_CPU_SP BIT_ULL(36) /* Small (1KB) page support */ #define MIPS_CPU_FTLB BIT_ULL(37) /* CPU has Fixed-page-size TLB */ #define MIPS_CPU_NAN_LEGACY BIT_ULL(38) /* Legacy NaN implemented */ diff --git a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h index ecfbb5aeada3..e6e527224a15 100644 --- a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h @@ -39,7 +39,6 @@ #define cpu_has_guestctl2 0 #define cpu_has_guestid 0 #define cpu_has_drg 0 -#define cpu_has_bp_ghist 0 #define cpu_has_mips16 0 #define cpu_has_mips16e2 0 #define cpu_has_mdmx 0 |