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author | Dave Martin <Dave.Martin@arm.com> | 2017-08-18 16:57:01 +0100 |
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committer | Ben Hutchings <ben@decadent.org.uk> | 2017-11-11 13:33:24 +0000 |
commit | d1494b93409c5b43931354fba5adbd29bec934fe (patch) | |
tree | 03898a11ec7238c640b1cee766a26b61920e2abc /arch/mips/mti-malta | |
parent | 599b7ea66b61f103f95ba7f67ac6c8ac098e7b32 (diff) | |
download | linux-stable-d1494b93409c5b43931354fba5adbd29bec934fe.tar.gz linux-stable-d1494b93409c5b43931354fba5adbd29bec934fe.tar.bz2 linux-stable-d1494b93409c5b43931354fba5adbd29bec934fe.zip |
arm64: fpsimd: Prevent registers leaking across exec
commit 096622104e14d8a1db4860bd557717067a0515d2 upstream.
There are some tricky dependencies between the different stages of
flushing the FPSIMD register state during exec, and these can race
with context switch in ways that can cause the old task's regs to
leak across. In particular, a context switch during the memset() can
cause some of the task's old FPSIMD registers to reappear.
Disabling preemption for this small window would be no big deal for
performance: preemption is already disabled for similar scenarios
like updating the FPSIMD registers in sigreturn.
So, instead of rearranging things in ways that might swap existing
subtle bugs for new ones, this patch just disables preemption
around the FPSIMD state flushing so that races of this type can't
occur here. This brings fpsimd_flush_thread() into line with other
code paths.
Fixes: 674c242c9323 ("arm64: flush FP/SIMD state correctly after execve()")
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
[bwh: Backported to 3.16: adjust context]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'arch/mips/mti-malta')
0 files changed, 0 insertions, 0 deletions