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| author | Shiji Yang <yangshiji66@outlook.com> | 2023-06-23 08:17:48 +0800 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2023-06-23 15:00:37 +0200 |
| commit | 670f77f76f650b1b341d31d009cc2fb03a4d1fcf (patch) | |
| tree | 3511bc8011c3faaedebec11e1241174154bb658b /arch/mips/sgi-ip32 | |
| parent | 7b191b9b55df2a844bd32d1d380f47a7df1c2896 (diff) | |
| download | linux-stable-670f77f76f650b1b341d31d009cc2fb03a4d1fcf.tar.gz linux-stable-670f77f76f650b1b341d31d009cc2fb03a4d1fcf.tar.bz2 linux-stable-670f77f76f650b1b341d31d009cc2fb03a4d1fcf.zip | |
mips: ralink: match all supported system controller compatible strings
Recently, A new clock and reset controller driver has been introduced to
the ralink mips target[1]. It provides proper system control and adds more
SoC specific compatible strings. In order to better initialize CPUs, this
patch removes the outdated "ralink,mt7620a-sysc" and add all dt-binding
documented compatible strings to the system controller match table.
[1] https://lore.kernel.org/all/20230619040941.1340372-1-sergio.paracuellos@gmail.com/
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/sgi-ip32')
0 files changed, 0 insertions, 0 deletions