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| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2023-03-15 14:55:09 +0100 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2023-03-17 10:27:08 +0100 |
| commit | b984d7b56dfcf71648102e227120bdc247562d00 (patch) | |
| tree | 00e32ed3ffe1060c9a83089196b05d6130f56378 /arch/mips/sibyte/common | |
| parent | 1150e181a14666a77dde80252f2b5cbaea69a498 (diff) | |
| download | linux-stable-b984d7b56dfcf71648102e227120bdc247562d00.tar.gz linux-stable-b984d7b56dfcf71648102e227120bdc247562d00.tar.bz2 linux-stable-b984d7b56dfcf71648102e227120bdc247562d00.zip | |
MIPS: sibyte: Remove unused config option SIBYTE_BCM1x55
SIBYTE_BCM1x55 is not selected anywhere, so let's get rid of it.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/sibyte/common')
| -rw-r--r-- | arch/mips/sibyte/common/bus_watcher.c | 4 | ||||
| -rw-r--r-- | arch/mips/sibyte/common/cfe.c | 2 | ||||
| -rw-r--r-- | arch/mips/sibyte/common/sb_tbprof.c | 10 |
3 files changed, 8 insertions, 8 deletions
diff --git a/arch/mips/sibyte/common/bus_watcher.c b/arch/mips/sibyte/common/bus_watcher.c index d43291473f76..a296d2c51841 100644 --- a/arch/mips/sibyte/common/bus_watcher.c +++ b/arch/mips/sibyte/common/bus_watcher.c @@ -24,7 +24,7 @@ #include <asm/sibyte/sb1250_regs.h> #include <asm/sibyte/sb1250_int.h> #include <asm/sibyte/sb1250_scd.h> -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 #include <asm/sibyte/bcm1480_regs.h> #endif @@ -71,7 +71,7 @@ void check_bus_watcher(void) #if defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250) /* Use non-destructive register */ status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG)); -#elif defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#elif defined(CONFIG_SIBYTE_BCM1x80) /* Use non-destructive register */ /* Same as 1250 except BUS_ERR_STATUS_DEBUG is in a different place. */ status = csr_in32(IOADDR(A_BCM1480_BUS_ERR_STATUS_DEBUG)); diff --git a/arch/mips/sibyte/common/cfe.c b/arch/mips/sibyte/common/cfe.c index 2503f60271e8..2cb90dbbe843 100644 --- a/arch/mips/sibyte/common/cfe.c +++ b/arch/mips/sibyte/common/cfe.c @@ -295,7 +295,7 @@ void __init prom_init(void) #if defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250) register_smp_ops(&sb_smp_ops); #endif -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 register_smp_ops(&bcm1480_smp_ops); #endif } diff --git a/arch/mips/sibyte/common/sb_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c index bc47681e825a..004a08469a39 100644 --- a/arch/mips/sibyte/common/sb_tbprof.c +++ b/arch/mips/sibyte/common/sb_tbprof.c @@ -23,7 +23,7 @@ #include <asm/io.h> #include <asm/sibyte/sb1250.h> -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 #include <asm/sibyte/bcm1480_regs.h> #include <asm/sibyte/bcm1480_scd.h> #include <asm/sibyte/bcm1480_int.h> @@ -35,7 +35,7 @@ #error invalid SiByte UART configuration #endif -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 #undef K_INT_TRACE_FREEZE #define K_INT_TRACE_FREEZE K_BCM1480_INT_TRACE_FREEZE #undef K_INT_PERF_CNT @@ -157,7 +157,7 @@ static void arm_tb(void) * a previous interrupt request. This means that bus profiling * requires ALL of the SCD perf counters. */ -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 __raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) | /* keep counters 0,2,3,4,5,6,7 as is */ V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */ @@ -290,7 +290,7 @@ static int sbprof_zbprof_start(struct file *filp) * pass them through. I am exploiting my knowledge that * cp0_status masks out IP[5]. krw */ -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 __raw_writeq(K_BCM1480_INT_MAP_I3, IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_L) + ((K_BCM1480_INT_PERF_CNT & 0x3f) << 3))); @@ -343,7 +343,7 @@ static int sbprof_zbprof_start(struct file *filp) __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7)); /* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */ -#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) +#ifdef CONFIG_SIBYTE_BCM1x80 __raw_writeq(1ULL << (K_BCM1480_INT_PERF_CNT & 0x3f), IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_TRACE_L))); #else |