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| author | Huacai Chen <chenhuacai@loongson.cn> | 2022-07-20 18:51:28 +0800 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2022-07-20 12:09:21 +0100 |
| commit | 023087324000ae704cf3cfd0abf1fc30c6e0e8d5 (patch) | |
| tree | a6d42f34e72107d6bec9afcbf05dafab558451f5 /arch/mips | |
| parent | bcdd75c596c89d7925a3438fde2578ca23a62b06 (diff) | |
| download | linux-stable-023087324000ae704cf3cfd0abf1fc30c6e0e8d5.tar.gz linux-stable-023087324000ae704cf3cfd0abf1fc30c6e0e8d5.tar.bz2 linux-stable-023087324000ae704cf3cfd0abf1fc30c6e0e8d5.zip | |
irqchip/loongson-pch-msi: Add ACPI init support
PCH-PIC/PCH-MSI stands for "Interrupt Controller" that described in
Section 5 of "Loongson 7A1000 Bridge User Manual". For more information
please refer Documentation/loongarch/irq-chip-model.rst.
Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn>
Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/1658314292-35346-10-git-send-email-lvjianmin@loongson.cn
Diffstat (limited to 'arch/mips')
0 files changed, 0 insertions, 0 deletions