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authorAndrew Bresticker <abrestic@chromium.org>2014-09-18 14:47:26 -0700
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 07:44:56 +0100
commit4a6a3ea392306b04fc687d4314efba562121cc9a (patch)
tree108812971050e86179140b7754d335b54b134509 /arch/mips
parentfbd552417bf275f6da591a0118a019b3006245fd (diff)
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irqchip: mips-gic: Use separate edge/level irq_chips
GIC edge-triggered interrupts must be acknowledged by clearing the edge detector via a write to GIC_SH_WEDGE. Create a separate edge-triggered irq_chip with the appropriate irq_ack() callback. This also allows us to get rid of gic_irq_flags. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Jason Cooper <jason@lakedaemon.net> Reviewed-by: Qais Yousef <qais.yousef@imgtec.com> Tested-by: Qais Yousef <qais.yousef@imgtec.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jeffrey Deans <jeffrey.deans@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7818/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/gic.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 8d1e457c0af9..f2453958cbe5 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -345,7 +345,6 @@
extern unsigned int gic_present;
extern unsigned int gic_frequency;
extern unsigned long _gic_base;
-extern unsigned int gic_irq_flags[];
extern unsigned int gic_cpu_pin;
extern void gic_init(unsigned long gic_base_addr,