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author | Alexander Sverdlin <alexander.sverdlin@nsn.com> | 2014-10-23 15:55:04 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2014-10-27 01:43:57 +0100 |
commit | cf355704d681ce7043c732e732b0a23c27d158a8 (patch) | |
tree | d5a846e4543ada9fb27f3b8adcd911ed3d201e96 /arch/mips | |
parent | cac7f2429872d3733dc3f9915857b1691da2eb2f (diff) | |
download | linux-stable-cf355704d681ce7043c732e732b0a23c27d158a8.tar.gz linux-stable-cf355704d681ce7043c732e732b0a23c27d158a8.tar.bz2 linux-stable-cf355704d681ce7043c732e732b0a23c27d158a8.zip |
MIPS: Octeon: Make Octeon GPIO IRQ chip CPU hotplug-aware
Make Octeon GPIO IRQ chip CPU hotplug-aware
Seems that irq_cpu_offline callbacks were forgotten in v1 and v2 CIU
GPIO chips. There is such a callback for octeon_irq_chip_ciu2_gpio,
covering CIU2 chips. Without this callback GPIO IRQs are not being migrated
during core offlining. Patch is tested on Octeon II.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nsn.com>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8201/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/cavium-octeon/octeon-irq.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 741734049675..2bc4aa95944e 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -809,6 +809,7 @@ static struct irq_chip octeon_irq_chip_ciu_gpio_v2 = { .irq_set_type = octeon_irq_ciu_gpio_set_type, #ifdef CONFIG_SMP .irq_set_affinity = octeon_irq_ciu_set_affinity_v2, + .irq_cpu_offline = octeon_irq_cpu_offline_ciu, #endif .flags = IRQCHIP_SET_TYPE_MASKED, }; @@ -823,6 +824,7 @@ static struct irq_chip octeon_irq_chip_ciu_gpio = { .irq_set_type = octeon_irq_ciu_gpio_set_type, #ifdef CONFIG_SMP .irq_set_affinity = octeon_irq_ciu_set_affinity, + .irq_cpu_offline = octeon_irq_cpu_offline_ciu, #endif .flags = IRQCHIP_SET_TYPE_MASKED, }; |