diff options
| author | Helge Deller <deller@gmx.de> | 2009-01-18 19:30:18 +0100 |
|---|---|---|
| committer | Kyle McMartin <kyle@mcmartin.ca> | 2009-03-31 02:51:33 +0000 |
| commit | 1152a68c4226ce48c95241b6ffc543850b4b3a97 (patch) | |
| tree | 0686acc6fdc3aa49206732a9119789741c835cb0 /arch/parisc/kernel/entry.S | |
| parent | 48d27cb2299c0b2fc4d551bddb6a1005828dc0c6 (diff) | |
| download | linux-stable-1152a68c4226ce48c95241b6ffc543850b4b3a97.tar.gz linux-stable-1152a68c4226ce48c95241b6ffc543850b4b3a97.tar.bz2 linux-stable-1152a68c4226ce48c95241b6ffc543850b4b3a97.zip | |
parisc: use constants instead of numbers in assembly
A few small fixups:
* _PAGE_SIZE_ENCODING_DEFAULT is wrong here, as one might assume that
it's possible to define the page size that way. This is wrong. Use 0 instead.
* use constants instead of hardcoded numerical values in depi and extru
while building the PFN out of the pte entry
* use SHRREG instead of extru (iitlba expects the PFN at bits {7..26})
Still wondering why we can use the same register (pte) as extru source
and target register, but it seems to work on PA1.1 and PA2.0...
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
Diffstat (limited to 'arch/parisc/kernel/entry.S')
| -rw-r--r-- | arch/parisc/kernel/entry.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index 0db9fdcb7709..0f7ff938b06a 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S @@ -563,8 +563,8 @@ /* Get rid of prot bits and convert to page addr for iitlba */ - depi _PAGE_SIZE_ENCODING_DEFAULT,31,ASM_PFN_PTE_SHIFT,\pte - extru \pte,24,25,\pte + depi 0,31,ASM_PFN_PTE_SHIFT,\pte + SHRREG \pte,(ASM_PFN_PTE_SHIFT-(31-26)),\pte .endm /* This is for ILP32 PA2.0 only. The TLB insertion needs @@ -1337,8 +1337,8 @@ nadtlb_check_flush_11: /* Get rid of prot bits and convert to page addr for idtlba */ - depi 0,31,12,pte - extru pte,24,25,pte + depi 0,31,ASM_PFN_PTE_SHIFT,pte + SHRREG pte,(ASM_PFN_PTE_SHIFT-(31-26)),pte mfsp %sr1,t0 /* Save sr1 so we can use it in tlb inserts */ mtsp spc,%sr1 |