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authorPaul Mackerras <paulus@ozlabs.org>2018-10-08 16:30:56 +1100
committerMichael Ellerman <mpe@ellerman.id.au>2018-10-09 16:04:27 +1100
commit32eb150aee8dce5076638ebafe53732276c9f28e (patch)
treeeed9227746802e00047584bbf3317d78e1a80dbc /arch/powerpc/kernel/eeh.c
parent95a6432ce903858a2f285d611275340aa574c6ac (diff)
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KVM: PPC: Book3S HV: Handle hypervisor instruction faults better
Currently the code for handling hypervisor instruction page faults passes 0 for the flags indicating the type of fault, which is OK in the usual case that the page is not mapped in the partition-scoped page tables. However, there are other causes for hypervisor instruction page faults, such as not being to update a reference (R) or change (C) bit. The cause is indicated in bits in HSRR1, including a bit which indicates that the fault is due to not being able to write to a page (for example to update an R or C bit). Not handling these other kinds of faults correctly can lead to a loop of continual faults without forward progress in the guest. In order to handle these faults better, this patch constructs a "DSISR-like" value from the bits which DSISR and SRR1 (for a HISI) have in common, and passes it to kvmppc_book3s_hv_page_fault() so that it knows what caused the fault. Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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