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author | Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> | 2016-03-01 12:59:18 +0530 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-03-03 21:18:29 +1100 |
commit | c367a44133bcd7f94fb48b58e991dbffe7c25e22 (patch) | |
tree | e8f66ecba7bc2d5d0bd5bb44125bc9a73aa746a5 /arch/powerpc/kernel/idle_power7.S | |
parent | e9a681478ce535b4a0263a760a25a65fd8ca5ba3 (diff) | |
download | linux-stable-c367a44133bcd7f94fb48b58e991dbffe7c25e22.tar.gz linux-stable-c367a44133bcd7f94fb48b58e991dbffe7c25e22.tar.bz2 linux-stable-c367a44133bcd7f94fb48b58e991dbffe7c25e22.zip |
powerpc/mm: add _PAGE_HASHPTE similar to 4K hash
We don't need to update linux page table entry with _PAGE_HASHPTE early
in hash pte fault. A parallel pte update will loop via _PAGE_BUSY
and look at _PAGE_HASHPTE for a required hpte flush only if
_PAGE_BUSY is cleared. That ensures a pte update will wait for a
parallel hpte insert to finish before looking at _PAGE_HASHPTE bit.
To avoid further confusion drop setting _PAGE_HASHPTE in cmpxchg in __hash_page_4K.
commit 41743a4e34f0 ("powerpc: Free a PTE bit on ppc64 with 64K pages")
did similar change for 64K config
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel/idle_power7.S')
0 files changed, 0 insertions, 0 deletions