diff options
author | Cyril Bur <cyrilbur@gmail.com> | 2017-11-02 14:09:06 +1100 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2017-11-06 20:39:34 +1100 |
commit | 6f700d38a8c9dc4d786ac4a831073194f17c5076 (patch) | |
tree | f0190f89668664fc9f30c0e07e7a70a7eb3132c8 /arch/powerpc/kernel/traps.c | |
parent | eb5c3f1c86470fc1a57ab28cce15c12e4d6cdf8b (diff) | |
download | linux-stable-6f700d38a8c9dc4d786ac4a831073194f17c5076.tar.gz linux-stable-6f700d38a8c9dc4d786ac4a831073194f17c5076.tar.bz2 linux-stable-6f700d38a8c9dc4d786ac4a831073194f17c5076.zip |
powerpc: Remove facility loadups on transactional {fp, vec, vsx} unavailable
After handling a transactional FP, Altivec or VSX unavailable exception.
The return to userspace code will detect that the TIF_RESTORE_TM bit is
set and call restore_tm_state(). restore_tm_state() will call
restore_math() to ensure that the correct facilities are loaded.
This means that all the loadup code in {fp,altivec,vsx}_unavailable_tm()
is doing pointless work and can simply be removed.
Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel/traps.c')
-rw-r--r-- | arch/powerpc/kernel/traps.c | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 4e5a543d0b74..f3eb61be0d30 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c @@ -1663,12 +1663,6 @@ out: void fp_unavailable_tm(struct pt_regs *regs) { - /* - * Save the MSR now because tm_reclaim_current() is likely to - * change it - */ - unsigned long orig_msr = regs->msr; - /* Note: This does not handle any kind of FP laziness. */ TM_DEBUG("FP Unavailable trap whilst transactional at 0x%lx, MSR=%lx\n", @@ -1694,24 +1688,10 @@ void fp_unavailable_tm(struct pt_regs *regs) * so we don't want to load the VRs from the thread_struct. */ tm_recheckpoint(¤t->thread); - - /* If VMX is in use, get the transactional values back */ - if (orig_msr & MSR_VEC) { - msr_check_and_set(MSR_VEC); - load_vr_state(¤t->thread.vr_state); - /* At this point all the VSX state is loaded, so enable it */ - regs->msr |= MSR_VSX; - } } void altivec_unavailable_tm(struct pt_regs *regs) { - /* - * Save the MSR now because tm_reclaim_current() is likely to - * change it - */ - unsigned long orig_msr = regs->msr; - /* See the comments in fp_unavailable_tm(). This function operates * the same way. */ @@ -1723,12 +1703,6 @@ void altivec_unavailable_tm(struct pt_regs *regs) current->thread.load_vec = 1; tm_recheckpoint(¤t->thread); current->thread.used_vr = 1; - - if (orig_msr & MSR_FP) { - msr_check_and_set(MSR_FP); - load_fp_state(¤t->thread.fp_state); - regs->msr |= MSR_VSX; - } } void vsx_unavailable_tm(struct pt_regs *regs) @@ -1753,10 +1727,6 @@ void vsx_unavailable_tm(struct pt_regs *regs) current->thread.load_fp = 1; tm_recheckpoint(¤t->thread); - - msr_check_and_set(MSR_FP | MSR_VEC); - load_fp_state(¤t->thread.fp_state); - load_vr_state(¤t->thread.vr_state); } #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ |