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| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2021-12-21 16:59:04 +1100 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2021-12-23 22:35:13 +1100 |
| commit | 62479e6e26ef18f00e2e540c0e30156254533a43 (patch) | |
| tree | af0ab41abf5be8ba9bee305ed6e6c4aa3cf6ba98 /arch/powerpc/mm/book3s64/hash_native.c | |
| parent | d51f86cfd8e378d4907958db77da3074f6dce3ba (diff) | |
| download | linux-stable-62479e6e26ef18f00e2e540c0e30156254533a43.tar.gz linux-stable-62479e6e26ef18f00e2e540c0e30156254533a43.tar.bz2 linux-stable-62479e6e26ef18f00e2e540c0e30156254533a43.zip | |
powerpc/mm/book3s64/hash: Switch pre 2.06 tlbiel to .long
The llvm integrated assembler does not recognise the ISA 2.05 tlbiel
version. Work around it by switching to .long when an old arch level
detected.
Signed-off-by: Daniel Axtens <dja@axtens.net>
[aik: did "Eventually do this more smartly"]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20211221055904.555763-7-aik@ozlabs.ru
Diffstat (limited to 'arch/powerpc/mm/book3s64/hash_native.c')
| -rw-r--r-- | arch/powerpc/mm/book3s64/hash_native.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/mm/book3s64/hash_native.c b/arch/powerpc/mm/book3s64/hash_native.c index d2a320828c0b..623a7b7ab38b 100644 --- a/arch/powerpc/mm/book3s64/hash_native.c +++ b/arch/powerpc/mm/book3s64/hash_native.c @@ -163,7 +163,7 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) va |= ssize << 8; sllp = get_sllp_encoding(apsize); va |= sllp << 5; - asm volatile(ASM_FTR_IFSET("tlbiel %0", "tlbiel %0,0", %1) + asm volatile(ASM_FTR_IFSET("tlbiel %0", PPC_TLBIEL_v205(%0, 0), %1) : : "r" (va), "i" (CPU_FTR_ARCH_206) : "memory"); break; @@ -182,7 +182,7 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) */ va |= (vpn & 0xfe); va |= 1; /* L */ - asm volatile(ASM_FTR_IFSET("tlbiel %0", "tlbiel %0,1", %1) + asm volatile(ASM_FTR_IFSET("tlbiel %0", PPC_TLBIEL_v205(%0, 1), %1) : : "r" (va), "i" (CPU_FTR_ARCH_206) : "memory"); break; |