diff options
| author | Gavin Shan <gwshan@linux.vnet.ibm.com> | 2016-08-02 14:10:29 +1000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-10-04 16:28:18 +1100 |
| commit | d63e51b31e0b655ed0f581b8a8fd4c4b4f8d1919 (patch) | |
| tree | 437c33a48225e5417b2d086afa299e9ece6ad259 /arch/powerpc | |
| parent | 39f0d6fbdc3f205d0c61a9c530c6827193cba64b (diff) | |
| download | linux-stable-d63e51b31e0b655ed0f581b8a8fd4c4b4f8d1919.tar.gz linux-stable-d63e51b31e0b655ed0f581b8a8fd4c4b4f8d1919.tar.bz2 linux-stable-d63e51b31e0b655ed0f581b8a8fd4c4b4f8d1919.zip | |
powerpc/powernv: Pass CPU-endian PE number to opal_pci_eeh_freeze_clear()
The PE number (@frozen_pe_no), filled by opal_pci_next_error() is in
big-endian format. It should be converted to CPU-endian before it is
passed to opal_pci_eeh_freeze_clear() when clearing the frozen state if
the PE is invalid one. As Michael Ellerman pointed out, the issue is
also detected by sparse:
eeh-powernv.c:1541:41: warning: incorrect type in argument 2 (different base types)
This passes CPU-endian PE number to opal_pci_eeh_freeze_clear() and it
should be part of commit <0f36db77643b> ("powerpc/eeh: Fix wrong printed
PE number"), which was merged to 4.3 kernel.
Fixes: 71b540adffd9 ("powerpc/powernv: Don't escalate non-existing frozen PE")
Cc: stable@vger.kernel.org # v4.3+
Suggested-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/platforms/powernv/eeh-powernv.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c index 995947d81989..1596a7e3ff19 100644 --- a/arch/powerpc/platforms/powernv/eeh-powernv.c +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c @@ -1546,7 +1546,7 @@ static int pnv_eeh_next_error(struct eeh_pe **pe) /* Try best to clear it */ opal_pci_eeh_freeze_clear(phb->opal_id, - frozen_pe_no, + be64_to_cpu(frozen_pe_no), OPAL_EEH_ACTION_CLEAR_FREEZE_ALL); ret = EEH_NEXT_ERR_NONE; } else if ((*pe)->state & EEH_PE_ISOLATED || |