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author | Anup Patel <anup.patel@wdc.com> | 2021-02-09 11:16:20 +0530 |
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committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2021-02-26 21:24:02 -0800 |
commit | b122c7a32593190c8a82f5470e2788bed451f98f (patch) | |
tree | 9d311bbb81c708d7061a10633c7aca0a2519a04f /arch/riscv/configs/defconfig | |
parent | f01e631cccab4b299cf005c42a3176595a3f3f9d (diff) | |
download | linux-stable-b122c7a32593190c8a82f5470e2788bed451f98f.tar.gz linux-stable-b122c7a32593190c8a82f5470e2788bed451f98f.tar.bz2 linux-stable-b122c7a32593190c8a82f5470e2788bed451f98f.zip |
RISC-V: Enable CPU Hotplug in defconfigs
The CPU hotplug support has been tested on QEMU, Spike, and SiFive
Unleashed so let's enable it by default in RV32 and RV64 defconfigs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv/configs/defconfig')
-rw-r--r-- | arch/riscv/configs/defconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 8c3d1e451703..6c0625aa96c7 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -17,6 +17,7 @@ CONFIG_BPF_SYSCALL=y CONFIG_SOC_SIFIVE=y CONFIG_SOC_VIRT=y CONFIG_SMP=y +CONFIG_HOTPLUG_CPU=y CONFIG_JUMP_LABEL=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y |