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| author | Paolo Bonzini <pbonzini@redhat.com> | 2022-10-03 15:33:43 -0400 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-10-03 15:33:43 -0400 |
| commit | e18d6152ff0f41b7f01f9817372022df04e0d354 (patch) | |
| tree | 9ddc6841785bb3349933c6d832e722ba91cea131 /arch/riscv/include/asm/cacheflush.h | |
| parent | fe4d9e4abf622598bd199d0805d20afa12f70c92 (diff) | |
| parent | b60ca69715fcc39a5f4bdd56ca2ea691b7358455 (diff) | |
| download | linux-stable-e18d6152ff0f41b7f01f9817372022df04e0d354.tar.gz linux-stable-e18d6152ff0f41b7f01f9817372022df04e0d354.tar.bz2 linux-stable-e18d6152ff0f41b7f01f9817372022df04e0d354.zip | |
Merge tag 'kvm-riscv-6.1-1' of https://github.com/kvm-riscv/linux into HEAD
KVM/riscv changes for 6.1
- Improved instruction encoding infrastructure for
instructions not yet supported by binutils
- Svinval support for both KVM Host and KVM Guest
- Zihintpause support for KVM Guest
- Zicbom support for KVM Guest
- Record number of signal exits as a VCPU stat
- Use generic guest entry infrastructure
Diffstat (limited to 'arch/riscv/include/asm/cacheflush.h')
| -rw-r--r-- | arch/riscv/include/asm/cacheflush.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h index a60acaecfeda..273ece6b622f 100644 --- a/arch/riscv/include/asm/cacheflush.h +++ b/arch/riscv/include/asm/cacheflush.h @@ -42,6 +42,11 @@ void flush_icache_mm(struct mm_struct *mm, bool local); #endif /* CONFIG_SMP */ +/* + * The T-Head CMO errata internally probe the CBOM block size, but otherwise + * don't depend on Zicbom. + */ +extern unsigned int riscv_cbom_block_size; #ifdef CONFIG_RISCV_ISA_ZICBOM void riscv_init_cbom_blocksize(void); #else |