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| author | Evan Green <evan@rivosinc.com> | 2023-05-09 11:25:01 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-06-19 09:51:16 -0700 |
| commit | c6699baf10647b87b075bf6c65d25b4cd52d4830 (patch) | |
| tree | f4a721b4d217e7dce0a88f80d77a7fc360b81ffc /arch/riscv/include | |
| parent | ac9a78681b921877518763ba0e89202254349d1b (diff) | |
| download | linux-stable-c6699baf10647b87b075bf6c65d25b4cd52d4830.tar.gz linux-stable-c6699baf10647b87b075bf6c65d25b4cd52d4830.tar.bz2 linux-stable-c6699baf10647b87b075bf6c65d25b4cd52d4830.zip | |
RISC-V: Add Zba, Zbs extension probing
Add the Zba address bit manipulation extension and Zbs single bit
instructions extension into those the kernel is aware of and maintains
in its riscv_isa bitmap.
Signed-off-by: Evan Green <evan@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Link: https://lore.kernel.org/r/20230509182504.2997252-2-evan@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/include')
| -rw-r--r-- | arch/riscv/include/asm/hwcap.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index e0c40a4c63d5..6b2e8ff4638c 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -46,6 +46,8 @@ #define RISCV_ISA_EXT_ZICBOZ 34 #define RISCV_ISA_EXT_SMAIA 35 #define RISCV_ISA_EXT_SSAIA 36 +#define RISCV_ISA_EXT_ZBA 37 +#define RISCV_ISA_EXT_ZBS 38 #define RISCV_ISA_EXT_MAX 64 #define RISCV_ISA_EXT_NAME_LEN_MAX 32 |