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author | Palmer Dabbelt <palmer@dabbelt.com> | 2017-07-10 18:00:26 -0700 |
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committer | Palmer Dabbelt <palmer@dabbelt.com> | 2017-09-26 15:26:44 -0700 |
commit | 76d2a0493a17d4c8ecc781366850c3c4f8e1a446 (patch) | |
tree | 5612f17472f4f3bd6fb49e217cb998f5c32836c4 /arch/riscv/kernel/time.c | |
parent | 8caea502367056881e5209ca55a7a01775c9a1cd (diff) | |
download | linux-stable-76d2a0493a17d4c8ecc781366850c3c4f8e1a446.tar.gz linux-stable-76d2a0493a17d4c8ecc781366850c3c4f8e1a446.tar.bz2 linux-stable-76d2a0493a17d4c8ecc781366850c3c4f8e1a446.zip |
RISC-V: Init and Halt Code
This contains the various __init C functions, the initial assembly
kernel entry point, and the code to reset the system. When a file was
init-related this patch contains the entire file.
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
Diffstat (limited to 'arch/riscv/kernel/time.c')
-rw-r--r-- | arch/riscv/kernel/time.c | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c new file mode 100644 index 000000000000..2463fcca719e --- /dev/null +++ b/arch/riscv/kernel/time.c @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2012 Regents of the University of California + * Copyright (C) 2017 SiFive + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation, version 2. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/clocksource.h> +#include <linux/clockchips.h> +#include <linux/delay.h> + +#ifdef CONFIG_RISCV_TIMER +#include <linux/timer_riscv.h> +#endif + +#include <asm/sbi.h> + +unsigned long riscv_timebase; + +DECLARE_PER_CPU(struct clock_event_device, riscv_clock_event); + +void riscv_timer_interrupt(void) +{ +#ifdef CONFIG_RISCV_TIMER + /* + * FIXME: This needs to be cleaned up along with the rest of the IRQ + * handling cleanup. See irq.c for more details. + */ + struct clock_event_device *evdev = this_cpu_ptr(&riscv_clock_event); + + evdev->event_handler(evdev); +#endif +} + +void __init init_clockevent(void) +{ + timer_probe(); + csr_set(sie, SIE_STIE); +} + +void __init time_init(void) +{ + struct device_node *cpu; + u32 prop; + + cpu = of_find_node_by_path("/cpus"); + if (!cpu || of_property_read_u32(cpu, "timebase-frequency", &prop)) + panic(KERN_WARNING "RISC-V system with no 'timebase-frequency' in DTS\n"); + riscv_timebase = prop; + + lpj_fine = riscv_timebase / HZ; + + init_clockevent(); +} |