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| author | Matthew Wilcox (Oracle) <willy@infradead.org> | 2023-08-02 16:13:50 +0100 |
|---|---|---|
| committer | Andrew Morton <akpm@linux-foundation.org> | 2023-08-24 16:20:23 -0700 |
| commit | 864609c6a0b5f0464f6ec7869cb2a45a529c35d7 (patch) | |
| tree | c507990d6eaebe984f6362fc5e471a99d7028155 /arch/riscv/mm/cacheflush.c | |
| parent | 9fee28baa601f4dbf869b1373183b312d2d5ef3d (diff) | |
| download | linux-stable-864609c6a0b5f0464f6ec7869cb2a45a529c35d7.tar.gz linux-stable-864609c6a0b5f0464f6ec7869cb2a45a529c35d7.tar.bz2 linux-stable-864609c6a0b5f0464f6ec7869cb2a45a529c35d7.zip | |
riscv: implement the new page table range API
Add set_ptes(), update_mmu_cache_range() and flush_dcache_folio(). Change
the PG_dcache_clean flag from being per-page to per-folio.
Link: https://lkml.kernel.org/r/20230802151406.3735276-23-willy@infradead.org
Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Acked-by: Mike Rapoport (IBM) <rppt@kernel.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Diffstat (limited to 'arch/riscv/mm/cacheflush.c')
| -rw-r--r-- | arch/riscv/mm/cacheflush.c | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c index fbc59b3f69f2..f1387272a551 100644 --- a/arch/riscv/mm/cacheflush.c +++ b/arch/riscv/mm/cacheflush.c @@ -82,18 +82,11 @@ void flush_icache_mm(struct mm_struct *mm, bool local) #ifdef CONFIG_MMU void flush_icache_pte(pte_t pte) { - struct page *page = pte_page(pte); + struct folio *folio = page_folio(pte_page(pte)); - /* - * HugeTLB pages are always fully mapped, so only setting head page's - * PG_dcache_clean flag is enough. - */ - if (PageHuge(page)) - page = compound_head(page); - - if (!test_bit(PG_dcache_clean, &page->flags)) { + if (!test_bit(PG_dcache_clean, &folio->flags)) { flush_icache_all(); - set_bit(PG_dcache_clean, &page->flags); + set_bit(PG_dcache_clean, &folio->flags); } } #endif /* CONFIG_MMU */ |