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| author | Marc Zyngier <maz@kernel.org> | 2020-10-14 19:52:29 +0100 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2020-11-10 08:34:26 +0000 |
| commit | bb666c472ca25efb38d1163131cc01546b3a653a (patch) | |
| tree | 3448ad034ca03d86260393eafbddd3735b06e886 /arch/riscv | |
| parent | e650b64f1a56cbc700f0a2d2ab8d23155757e2f3 (diff) | |
| download | linux-stable-bb666c472ca25efb38d1163131cc01546b3a653a.tar.gz linux-stable-bb666c472ca25efb38d1163131cc01546b3a653a.tar.bz2 linux-stable-bb666c472ca25efb38d1163131cc01546b3a653a.zip | |
KVM: arm64: Inject AArch64 exceptions from HYP
Move the AArch64 exception injection code from EL1 to HYP, leaving
only the ESR_EL1 updates to EL1. In order to come with the differences
between VHE and nVHE, two set of system register accessors are provided.
SPSR, ELR, PC and PSTATE are now completely handled in the hypervisor.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch/riscv')
0 files changed, 0 insertions, 0 deletions