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author | Vasily Gorbik <gor@linux.ibm.com> | 2022-02-24 22:43:31 +0100 |
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committer | Vasily Gorbik <gor@linux.ibm.com> | 2022-03-10 15:58:17 +0100 |
commit | 4efd417f298bc23bc8b6ac5db5ff79af5ec92ac5 (patch) | |
tree | 41b6781eadef63b049d3c16fa5119f665c80f7a0 /arch/s390/kernel/smp.c | |
parent | 432b1cc78e985d3c783f1accb2507fbf5a87583d (diff) | |
download | linux-stable-4efd417f298bc23bc8b6ac5db5ff79af5ec92ac5.tar.gz linux-stable-4efd417f298bc23bc8b6ac5db5ff79af5ec92ac5.tar.bz2 linux-stable-4efd417f298bc23bc8b6ac5db5ff79af5ec92ac5.zip |
s390: raise minimum supported machine generation to z10
Machine generations up to z9 (released in May 2006) have been officially
out of service for several years now (z9 end of service - January 31, 2019).
No distributions build kernels supporting those old machine generations
anymore, except Debian, which seems to pick the oldest supported
generation. The team supporting Debian on s390 has been notified about
the change.
Raising minimum supported machine generation to z10 helps to reduce
maintenance cost and effectively remove code, which is not getting
enough testing coverage due to lack of older hardware and distributions
support. Besides that this unblocks some optimization opportunities and
allows to use wider instruction set in asm files for future features
implementation. Due to this change spectre mitigation and usercopy
implementations could be drastically simplified and many newer instructions
could be converted from ".insn" encoding to instruction names.
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
Diffstat (limited to 'arch/s390/kernel/smp.c')
-rw-r--r-- | arch/s390/kernel/smp.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c index 368b58e4c2e7..127da1850b06 100644 --- a/arch/s390/kernel/smp.c +++ b/arch/s390/kernel/smp.c @@ -207,7 +207,6 @@ static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) lc->cpu_nr = cpu; lc->spinlock_lockval = arch_spin_lockval(cpu); lc->spinlock_index = 0; - lc->br_r1_trampoline = 0x07f1; /* br %r1 */ lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW); lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW); lc->preempt_count = PREEMPT_DISABLED; |