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author | Conor Dooley <conor.dooley@microchip.com> | 2023-06-07 21:28:26 +0100 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-06-21 07:45:14 -0700 |
commit | 2ac874343749b76e069cff5fea09c49e0bd365a0 (patch) | |
tree | 87dd9f5a9a8b2c0f16a15c4aeb8d440eee7af54d /arch/um/drivers | |
parent | fed14be476f075a523fd4addfee07cb2f8dc1971 (diff) | |
download | linux-stable-2ac874343749b76e069cff5fea09c49e0bd365a0.tar.gz linux-stable-2ac874343749b76e069cff5fea09c49e0bd365a0.tar.bz2 linux-stable-2ac874343749b76e069cff5fea09c49e0bd365a0.zip |
RISC-V: split early & late of_node to hartid mapping
Some back and forth with Drew [1] about riscv_fill_hwcap() resulted in
the realisation that it is not very useful to parse the DT & perform
validation of riscv,isa every time we would like to get the id for a
hart.
Although it is no longer called in riscv_fill_hwcap(),
riscv_of_processor_hartid() is called in several other places.
Notably in setup_smp() it forms part of the logic for filling the mask
of possible CPUs. Since a possible CPU must have passed this basic
validation of riscv,isa, a repeat validation is not required.
Rename riscv_of_processor_id() to riscv_early_of_processor_id(),
which will be called from setup_smp() & introduce a new
riscv_of_processor_id() which makes use of the pre-populated mask of
possible cpus.
Link: https://lore.kernel.org/linux-riscv/xvdswl3iyikwvamny7ikrxo2ncuixshtg3f6uucjahpe3xpc5c@ud4cz4fkg5dj/ [1]
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Link: https://lore.kernel.org/r/20230607-glade-pastel-d8cbd9d9f3c6@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/um/drivers')
0 files changed, 0 insertions, 0 deletions