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author | Peter Zijlstra <peterz@infradead.org> | 2022-03-08 16:30:24 +0100 |
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committer | Peter Zijlstra <peterz@infradead.org> | 2022-03-15 10:32:35 +0100 |
commit | 8f93402b92d443573d310250efa0b7f352fec992 (patch) | |
tree | 11266084433c7e14a33df1318ebfb82e5357a5f1 /arch/x86/entry/entry_64_compat.S | |
parent | 5b2fc51576eff811a614e33cbbd0c3cb05022892 (diff) | |
download | linux-stable-8f93402b92d443573d310250efa0b7f352fec992.tar.gz linux-stable-8f93402b92d443573d310250efa0b7f352fec992.tar.bz2 linux-stable-8f93402b92d443573d310250efa0b7f352fec992.zip |
x86/ibt,entry: Sprinkle ENDBR dust
Kernel entry points should be having ENDBR on for IBT configs.
The SYSCALL entry points are found through taking their respective
address in order to program them in the MSRs, while the exception
entry points are found through UNWIND_HINT_IRET_REGS.
The rule is that any UNWIND_HINT_IRET_REGS at sym+0 should have an
ENDBR, see the later objtool ibt validation patch.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@redhat.com>
Link: https://lore.kernel.org/r/20220308154317.933157479@infradead.org
Diffstat (limited to 'arch/x86/entry/entry_64_compat.S')
-rw-r--r-- | arch/x86/entry/entry_64_compat.S | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S index 0051cf5c792d..35a0e69cf387 100644 --- a/arch/x86/entry/entry_64_compat.S +++ b/arch/x86/entry/entry_64_compat.S @@ -48,6 +48,7 @@ */ SYM_CODE_START(entry_SYSENTER_compat) UNWIND_HINT_EMPTY + ENDBR /* Interrupts are off on entry. */ SWAPGS @@ -198,6 +199,7 @@ SYM_CODE_END(entry_SYSENTER_compat) */ SYM_CODE_START(entry_SYSCALL_compat) UNWIND_HINT_EMPTY + ENDBR /* Interrupts are off on entry. */ swapgs @@ -340,6 +342,7 @@ SYM_CODE_END(entry_SYSCALL_compat) */ SYM_CODE_START(entry_INT80_compat) UNWIND_HINT_EMPTY + ENDBR /* * Interrupts are off on entry. */ |