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| author | Andrew Cooper <andrew.cooper3@citrix.com> | 2021-05-14 14:59:20 +0100 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2021-06-01 21:10:33 +0200 |
| commit | cbcddaa33d7e11a053cb80a4a635c023b4f8b906 (patch) | |
| tree | 9bd52ba379d2970f2d3045cf9c3bf0e82226f57f /arch/x86/include/asm/cpufeatures.h | |
| parent | 280b68a3b3b96b027fcdeb5a3916a8e2aaf84d03 (diff) | |
| download | linux-stable-cbcddaa33d7e11a053cb80a4a635c023b4f8b906.tar.gz linux-stable-cbcddaa33d7e11a053cb80a4a635c023b4f8b906.tar.bz2 linux-stable-cbcddaa33d7e11a053cb80a4a635c023b4f8b906.zip | |
perf/x86/rapl: Use CPUID bit on AMD and Hygon parts
AMD and Hygon CPUs have a CPUID bit for RAPL. Drop the fam17h suffix as
it is stale already.
Make use of this instead of a model check to work more nicely in virtual
environments where RAPL typically isn't available.
[ bp: drop the ../cpu/powerflags.c hunk which is superfluous as the
"rapl" bit name appears already in flags. ]
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20210514135920.16093-1-andrew.cooper3@citrix.com
Diffstat (limited to 'arch/x86/include/asm/cpufeatures.h')
| -rw-r--r-- | arch/x86/include/asm/cpufeatures.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index ac37830ae941..81269c73a0dc 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -108,7 +108,7 @@ #define X86_FEATURE_EXTD_APICID ( 3*32+26) /* Extended APICID (8 bits) */ #define X86_FEATURE_AMD_DCM ( 3*32+27) /* AMD multi-node processor */ #define X86_FEATURE_APERFMPERF ( 3*32+28) /* P-State hardware coordination feedback capability (APERF/MPERF MSRs) */ -/* free ( 3*32+29) */ +#define X86_FEATURE_RAPL ( 3*32+29) /* AMD/Hygon RAPL interface */ #define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */ #define X86_FEATURE_TSC_KNOWN_FREQ ( 3*32+31) /* TSC has known frequency */ |