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authorPeter Zijlstra <peterz@infradead.org>2020-05-29 23:27:36 +0200
committerThomas Gleixner <tglx@linutronix.de>2020-06-11 15:15:22 +0200
commit84b6a3491567a540f955e18d8e615493afa36df0 (patch)
tree6cb78ccb03028398a87ffff420648ed4637c1488 /arch/x86/include/asm/debugreg.h
parentcd840e424f27fcc1ae8d14b7ec3ec4560ee6561a (diff)
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x86/entry: Optimize local_db_save() for virt
Because DRn access is 'difficult' with virt; but the DR7 read is cheaper than a cacheline miss on native, add a virt specific fast path to local_db_save(), such that when breakpoints are not in use to avoid touching DRn entirely. Suggested-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200529213321.187833200@infradead.org
Diffstat (limited to 'arch/x86/include/asm/debugreg.h')
-rw-r--r--arch/x86/include/asm/debugreg.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/x86/include/asm/debugreg.h b/arch/x86/include/asm/debugreg.h
index 4ef8690be8a7..3e1c5021d0f8 100644
--- a/arch/x86/include/asm/debugreg.h
+++ b/arch/x86/include/asm/debugreg.h
@@ -85,7 +85,7 @@ static inline void hw_breakpoint_disable(void)
set_debugreg(0UL, 3);
}
-static inline int hw_breakpoint_active(void)
+static inline bool hw_breakpoint_active(void)
{
return __this_cpu_read(cpu_dr7) & DR_GLOBAL_ENABLE_MASK;
}
@@ -117,6 +117,9 @@ static __always_inline unsigned long local_db_save(void)
{
unsigned long dr7;
+ if (static_cpu_has(X86_FEATURE_HYPERVISOR) && !hw_breakpoint_active())
+ return 0;
+
get_debugreg(dr7, 7);
dr7 &= ~0x400; /* architecturally set bit */
if (dr7)