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| author | H. Peter Anvin <hpa@zytor.com> | 2012-06-07 13:32:04 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2012-06-07 13:32:04 -0700 |
| commit | 715c85b1fc824e9cd0ea07d6ceb80d2262f32e90 (patch) | |
| tree | 7371367ce975c575b844eddd63daed92d66830a4 /arch/x86/kernel/cpu/perf_event_p6.c | |
| parent | 2c929ce6f1ed1302be225512b433e6a6554f71a4 (diff) | |
| download | linux-stable-715c85b1fc824e9cd0ea07d6ceb80d2262f32e90.tar.gz linux-stable-715c85b1fc824e9cd0ea07d6ceb80d2262f32e90.tar.bz2 linux-stable-715c85b1fc824e9cd0ea07d6ceb80d2262f32e90.zip | |
x86, cpu: Rename checking_wrmsrl() to wrmsrl_safe()
Rename checking_wrmsrl() to wrmsrl_safe(), to match the naming
convention used by all the other MSR access functions/macros.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_p6.c')
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_p6.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_p6.c b/arch/x86/kernel/cpu/perf_event_p6.c index 32bcfc7dd230..e4dd0f7a0453 100644 --- a/arch/x86/kernel/cpu/perf_event_p6.c +++ b/arch/x86/kernel/cpu/perf_event_p6.c @@ -71,7 +71,7 @@ p6_pmu_disable_event(struct perf_event *event) if (cpuc->enabled) val |= ARCH_PERFMON_EVENTSEL_ENABLE; - (void)checking_wrmsrl(hwc->config_base, val); + (void)wrmsrl_safe(hwc->config_base, val); } static void p6_pmu_enable_event(struct perf_event *event) @@ -84,7 +84,7 @@ static void p6_pmu_enable_event(struct perf_event *event) if (cpuc->enabled) val |= ARCH_PERFMON_EVENTSEL_ENABLE; - (void)checking_wrmsrl(hwc->config_base, val); + (void)wrmsrl_safe(hwc->config_base, val); } PMU_FORMAT_ATTR(event, "config:0-7" ); |