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author | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2018-04-25 22:04:24 -0400 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2018-05-03 13:55:49 +0200 |
commit | 764f3c21588a059cd783c6ba0734d4db2d72822d (patch) | |
tree | ce5a4674c1c99218da979ade936f043f8ca3c45e /arch/x86/lib/inat.c | |
parent | 1115a859f33276fe8afb31c60cf9d8e657872558 (diff) | |
download | linux-stable-764f3c21588a059cd783c6ba0734d4db2d72822d.tar.gz linux-stable-764f3c21588a059cd783c6ba0734d4db2d72822d.tar.bz2 linux-stable-764f3c21588a059cd783c6ba0734d4db2d72822d.zip |
x86/bugs/AMD: Add support to disable RDS on Fam[15,16,17]h if requested
AMD does not need the Speculative Store Bypass mitigation to be enabled.
The parameters for this are already available and can be done via MSR
C001_1020. Each family uses a different bit in that MSR for this.
[ tglx: Expose the bit mask via a variable and move the actual MSR fiddling
into the bugs code as that's the right thing to do and also required
to prepare for dynamic enable/disable ]
Suggested-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/lib/inat.c')
0 files changed, 0 insertions, 0 deletions