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| author | Borislav Petkov <bp@suse.de> | 2022-11-14 12:44:01 +0100 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2022-11-15 10:15:58 -0800 |
| commit | 2632daebafd04746b4b96c2f26a6021bc38f6209 (patch) | |
| tree | c1d8dc14cd5d8ea8d68bb3dc926b715a33fb16ce /arch/x86/power | |
| parent | e01d50cbd6eece456843717a566a34e8b926cf0c (diff) | |
| download | linux-stable-2632daebafd04746b4b96c2f26a6021bc38f6209.tar.gz linux-stable-2632daebafd04746b4b96c2f26a6021bc38f6209.tar.bz2 linux-stable-2632daebafd04746b4b96c2f26a6021bc38f6209.zip | |
x86/cpu: Restore AMD's DE_CFG MSR after resume
DE_CFG contains the LFENCE serializing bit, restore it on resume too.
This is relevant to older families due to the way how they do S3.
Unify and correct naming while at it.
Fixes: e4d0e84e4907 ("x86/cpu/AMD: Make LFENCE a serializing instruction")
Reported-by: Andrew Cooper <Andrew.Cooper3@citrix.com>
Reported-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: <stable@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/x86/power')
| -rw-r--r-- | arch/x86/power/cpu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c index bb176c72891c..4cd39f304e20 100644 --- a/arch/x86/power/cpu.c +++ b/arch/x86/power/cpu.c @@ -519,6 +519,7 @@ static void pm_save_spec_msr(void) MSR_TSX_FORCE_ABORT, MSR_IA32_MCU_OPT_CTRL, MSR_AMD64_LS_CFG, + MSR_AMD64_DE_CFG, }; msr_build_context(spec_msr_id, ARRAY_SIZE(spec_msr_id)); |